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Maxim presents programmable analog/digital VGA

Posted: 23 Jun 2008 ?? ?Print Version ?Bookmark and Share

Keywords:variable-gain amplifier? analog and digital VGA? WiMAX?

Maxim Integrated Products has introduced the MAX2065, the industry's only fully programmable, multistate, analog and digital IF/RF variable-gain amplifier (VGA). This single, easy-to-control device delivers an unparalleled combination of VGA performance and component integration. Operating at 50-1,000MHz, the MAX2065 provides "rapid fire" gain selection for four customized attenuation states, fast 25ns digital switching, and very low digital VGA amplitude overshoot/undershoot. It is a suitable choice for "fast-attack" automatic gain control (AGC) circuits found in all 2.5G/3G/4G wireless infrastructure transceivers, including GSM/Edge, CDMA, W-CDMA, LTE and WiMAX applications.

The MAX2065 is the first device to integrate a linearly controlled 31dB voltage-variable attenuator; a 31dB digital step attenuator; a 22dB gain driver amplifier; an on-chip 8bit control DAC; and an SPI-compatible interface. In addition, the MAX2065's control features are customized to support fast-attack AGC circuits found in most wireless infrastructure receivers.

The MAX2065 can serve as either an IF or RF all-purpose VGA, interfacing directly with 50 systems that operate within the 50-1,000MHz frequency range. Since each of the three independent RF stages (analog attenuator, digital attenuator, and the amplifier) has its own RF input and RF output, the MAX2065 can be configured to optimize either noise figure (amplifier configured first within the cascade) or linearity (amplifier configured last), or configured to provide a compromise between the two parameters (amplifier configured second).

In its typical configuration (analog attenuator digital attenuator driver amplifier), the cascade yields a total gain range of 62dB, a maximum gain of 19.4dB, and a noise figure of only 6.5dB. The cascaded linearity is equally impressive with 42dBm of OIP3, 63dBm of OIP2 and 19dBm of OP1dB performance. In a receiver application, this excellent linearity directly enhances the receiver's immunity to strong blocker signals. Second- and third-order harmonic distortion (HD2 and HD3) content is also limited to -67dBc and -83dBc, respectively. This performance eases the filtering requirements of close-in harmonics and leads to simpler and more cost effective filter designs.

The chip's outstanding dynamic range, noise figure and linearity performance make it a good candidate for use in a variety of receiver and transmitter applications, including traditional cellular infrastructure, WiMAX/LTE, fixed-broadband wireless access, military systems, and cable-modem termination systems.

Unmatched integration
The MAX2065 was defined to provide RF designers with greater flexibility and general ease of use than is possible with discrete competitive devices. Through the integration of the five distinct circuit functions described above, the MAX2065 offers the following key benefits.

Reduced I/O: The MAX2065's SPI/MICROWIRE-compatible interface reduces the I/O pin count by a factor of 4x over comparable VGA circuits. This 3-wire interface can be used to control the 5bit digital attenuator and the analog attenuator (through the on-chip 8bit DAC). In addition, the SPI-interface enables the user to preprogram up to four customizable digital attenuator states used within the device's "rapid fire" gain-control mode.

Simple, direct, digital control of analog attenuator: The dedicated 8bit DAC for analog attenuation control is an industry first. With this on-chip control DAC, the user can easily adjust the analog attenuation in 0.12dB increments through a simple SPI command. By integrating this function, the device not only eliminates the need for a separate control DAC and voltage reference, but it also simplifies the overall design. No additional SPI peripherals need to be programmed and no additional analog control lines need to be routed on the PCB.

Although this on-chip DAC eliminates the need for an external analog control voltage, the user still has the option of disabling the DAC and using external analog voltage control, when additional attenuation resolution is needed or when the gain trim/AGC control loop is solely analog.

Fast-attack AGC circuits for wideband systems:In wireless infrastructure receivers, fast-attack AGC circuits are commonly used to protect against unwanted interference from intermittent, high-level blockers. Fast-switching VGAs are critical components within these AGC circuits since they rapidly attenuate the blocker signals, thus preventing the receiver chain's ADC from experiencing an overdrive condition. The MAX2065 was specifically designed for this fast-attack AGC application; many of the device's features are optimized to exploit its fast digital attenuator switching capabilities.

One of the critical design goals for the MAX2065 was to limit the amount of amplitude overshoot/undershoot exhibited during attenuation transitions. All digital attenuators demonstrate a finite amount of amplitude overshoot/undershoot as the devices settle from one attenuation state to another. Excessive overshoot/undershoot leads to spectral "splatter," resulting in degradations in EVM (transmit mode) and sensitivity (receiver mode). Because of these limitations, most wideband systems like W-CDMA, cdma2000, WiMAX, and LTE have historically employed analog-only VGA circuits.

By limiting the MAX2065's amplitude overshoot/undershoot to 0.05dB between any two attenuation states over an elapsed time of only 40ns, designers are now free to use the device's digital attenuator in a dynamic application for virtually all wideband systems.

The supplemental parallel-control bus circumvents SPI bus programming delays which can hinder fast-attack AGC circuits: To capitalize on this fast switching capability, the MAX2065 offers a supplemental 5bit, parallel-control interface. Direct access to this 5bit bus lets the user avoid any programming delays associated with the SPI interface. One of the limitations of any SPI bus is the speed at which commands can be clocked into each peripheral device. By offering direct access to the 5bit parallel interface, the user can quickly shift between any digital attenuation state, as needed, for critical fast-attack AGC applications.

Reduced I/O through the use of the rapid-fire, preprogrammed attenuator control pins: The MAX2065 has an added feature that provides "rapid-fire" gain selection among four preprogrammed attenuation steps. As with the supplemental 5bit bus mentioned above, this rapid-fire gain selection lets the user quickly access any of four customized digital attenuation states without incurring the delays associated with reprogramming the device through the SPI bus.

The switching speed is comparable to that achieved using the supplemental 5bit parallel bus. However, by employing the rapid-fire gain selection feature, the digital attenuator I/O is further reduced by a factor of either 5x or 2.5x (5 control bits vs. 1 or 2, respectively) depending on the number of states desired. Toggling just the STATE_A pin (1 control bit) will yield two preprogrammed attenuation states; toggling both the STATE_A and STATE_B pins together (2 control bits) will yield four preprogrammed attenuation states.

Consider an example situation. Assume that the AGC application requires a static attenuation adjustment to trim out gain inconsistencies within a receiver lineup. The same AGC circuit may also be required to attenuate dynamically an unwanted blocker signal that could desense the receiver and lead to an ADC overdrive condition. In this example, the MAX2065 would be preprogrammed (through the SPI bus) with two customized attenuation states: one state to address the static gain-trim adjustment, and the other state to counter the unwanted blocker condition. Toggling just the STATE_A control bit enables the user to switch rapidly between the static and dynamic attenuation settings with only one I/O pin.

If desired, the user can also program two additional attenuation states by using the STATE_B control bit as a second I/O pin. These additional attenuation settings are useful for software-defined radio applications where multiple static gain settings may be needed to account for different operating frequencies, or where multiple dynamic attenuation settings are needed to account for different blocker levels (as defined by multiple wireless standards).

Ability to optimize power dissipation vs. performance tradeoffs: The MAX2065 offers two ways to trade-off linearity performance for reduced power consumption. First, the device operates with either a 5V or 3.3V supply voltage. Using the 3.3V supply leads to a 3x reduction in power consumption. Despite the large savings in power, OIP3 linearity performance only degrades by 4.5dB. Secondly, the MAX2065 can be operated in a 5V low-current mode with a corresponding 1.7x power reduction and a 2dB reduction in OIP3 performance. Both options let the designer optimize the tradeoffs among power, performance, and operating cost.

Reduced component count and cost: Because of its SiGe BiCMOS process, the MAX2065 incorporates the five circuit functions noted above into a single, compact monolithic device. When compared to the sum of its discrete circuit equivalents, the MAX2065 provides 5x the functionality in one-third the space. The cost and space savings enable the next generation of wireless infrastructure designs in which transceiver price and density issues are paramount.

The MAX2065 is available in a 40-TQFN Pb-free package, and prices start at $7.48 (1,000-up). Pin-compatible digital-only (MAX2066) and analog-only (MAX2067) versions are also available.

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