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Cadence Virtuoso aids analog, mixed-signal SoC designs

Posted: 16 Jul 2008 ?? ?Print Version ?Bookmark and Share

Keywords:Virtuoso design platform? analog? SoC mixed-signal?

The latest version of Cadence Design Systems Inc.'s Virtuoso custom design platform has been deployed by Matsushita Electric Industrial Co. Ltd for analog and mixed-signal advanced node designs of its Semiconductor Company.

Matsushita used the Virtuoso IC 6.1 to design and verify its most complex and advanced node custom designs, aiming for design time reduction.

Cadence collaborated with Matsushita to ensure the latest version of the platform met the needs for designers performing analog/mixed-signal (AMS) design and verification. Cadence technologies are used by Matsushita to design blocks for larger AMS designs. The Virtuoso Analog Design Environment and the Virtuoso Layout Suite XL have been used by Matsushita. The company also has deployed Virtuoso Layout Migrate for IP reuse and migration.

"We have started using the new Virtuoso platform for both our advanced and legacy process nodes," said Seiji Yamaguchi, director, System LSI Technology Development Center, Semiconductor Company of Matsushita.

Cadence has been working with Matsushita from the conceptual phase of Virtuoso IC 6.1. According to Cadence, the technology provides an exceptionally fast and silicon-accurate way to design custom analog, RF, and mixed-signal ICs. The platform delivers integrated products on a common database to address complex design requirements across process nodes. Automated constraint management helps maintain design intent within the flow and across globally distributed design chains, and high-speed, comprehensive simulation engines enable constraint refinement. The platform's layout techniques and DFM technologies combine to deliver the best, most differentiated custom silicon possible, adds Cadence.





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