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Virage new DDR3 interface handles up to 1.6Gbit/s

Posted: 18 Jul 2008 ?? ?Print Version ?Bookmark and Share

Keywords:Intelli DDR memory interface? DDR3 architecture? memory interface designs?

Virage Logic has broadened its Intelli DDR memory interface product portfolio with the Intelli DDR3 memory interface that operates up to 1.6Gbit/s.

The Intelli DDR3 architecture utilizes Virage Logic's patent-pending digital delay locked-loop (DLL) architecture. It allows much higher data throughput efficiency than what was possible with previous architectures.

Such high efficiencies enable designs to operate at lower frequencies. It results in lower power consumption and lower BOMs, claims the company.

Virage Logic has optimized its DLL hard macros for memory interface designs. The Intelli DLL delays a set of signals by precise and adjustable portions of a reference clock cycle independent of voltage and temperature. They suit DDR applications where precision control is the key to a reliable high performance operation. The Intelli DLL has good jitter performance operating in the noisy environment of ASICs and SoCs.

The digital implementation makes it easy to target the Intelli DLL to a variety of technologies and processes. An all-digital implementation provides a very small chip footprint. This is important because a portion of the Intelli DLL is located at, or very near, the I/O pads. The high resolution available with an all digital implementation (around a gate delay) allows the Intelli DLL to provide precise control for edge placement and a maximum data capture window.

The Intelli DDR3 starts at $180,000 per project. Virage Logic also offers an optional system-level design review service.

Virage Logic started expanding its product offering of DDR memory controllers and design services through its acquisition of Ingot Systems in 2007. Recently Virage Logic acquired Impinj's logic non-volatile memory IP business to complement its IP portfolio.

- Nicolas Mokhoff
EE Times





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