Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Manufacturing/Packaging

Chip industry preps for 'More than Moore' era

Posted: 21 Jul 2008 ?? ?Print Version ?Bookmark and Share

Keywords:Moore's Law? chip industry? semiconductor market? consumer electronics?

Chip and IC equipment makers are at a crossroads as they enter an era that might be called "More than Moore."

The relentless pursuit of scaling over the last 40 years, in accordance with the famed postulate known as Moore's Law, continues to be an aggressive goal.

However, the buzz at the Semicon West equipment show last week suggests the time has come to rethink what is scalable and examine other ways of adding value to semiconductor devices.

Although leading IC makers Intel and IBM remain committed to Moore's Law (Intel in part out of respect for founder Gordon Moore's scaling formula), both are starting to address its limits. In addition, those limits are not just technical; they are economic as well.

Is it still practical?
At Semicon West, where the relentless market pressures facing chipmakers are measured in the progress of tools able to refine physical transistor gate lengths down to 22nm, the Greek chorus of industry gurus sounded a warning: In chasing after ever smaller and denser devices, it might just not be practical to go on scaling for the sake of scaling.

"It's been an economic issue all along," said keynoter Bernie Meyerson, an IBM fellow and CTO of the IBM Systems and Technology Group.

"Moore's Law stipulates that you need to double the density of chips every 12 to 18 months [for scaling purposes]; that's an economic, not a technical issue."

The recipe for scaling is expensive and geometries are approaching single atoms, which won't scale. Those facts are forcing the industry to look "beyond CMOS," simply because "the result of further scaling is more power consumption, more costly [devices] and slower operation," said Meyerson.

So tool vendors are starting to pursue other schemes. As part of the drive to add value to chips, new tools are emerging for such technologies as through-silicon via (TSV) for three-dimensional packages.

MEMS are also being considered. "Compound, TSV and MEMS are evolving technologies for mass-production quantity tools, driven by the consumer electronics business," said Jerry Cutini, president and CEO of Aziza Technology.

Growth forces
In his keynote here, Gadi Singer, VP of the mobility group at Intel Corp. and general manager of the SoC enabling group, argued that Moore's Law is a living, breathing organism that may need resuscitation once in a while, but is fundamentally relevant. "There are three forces that are converging as growth enablers for chips!the Internet, connectivity and Moore's Law," he said.

Singer pointed to a new class of smart, flexible, light and simple consumer devices that are the direct result of those forces!systems that potentially will be placed in the hands of more than a billion mobile Internet users. "The Internet has been for stationary users up to now," he said. "Five years from now, it will be part and parcel of mobile users!we are already seeing that in the likes of the Apple iPhone and the newest handhelds from Nokia and Samsung."

He reminded the audience that, "It takes 10 years for innovative technologies to be entrenched in volume production from the time they were researched and developed. Today we are in the midst of such a 10-year cycle to provide highly responsive consumer electronics gear that will work at low power and handle a huge pipeline of data transmission, both for downlinks and uplinks to the Web."

Singer pointed to the social phenomenon of the "millennials"!young users born in the 1980s!who are now sharing their lives on social-networking platforms such as YouTube, and who need to upload their experiences to the Internet. "As a parent of two, I don't say that all of it is good experiences to share, but nevertheless, the phenomenon is real and will only grow," he said.

Singer said collaboration is crucial in producing next-generation smart ICs. Adding functional blocks to the processor blocks will enable SoC with analog interfaces to the outside world and wireless circuits to make them "connectable." This is one route to the new "more than Moore" system-oriented chip.

On to the next big thing
As Intel enjoys the fruits of its current business strategy, thanks to strong worldwide computer demand, strategic R&D investments, manufacturing process improvements and good execution, executives like Singer are looking ahead to the next opportunity.

"Today, our Atom chip was a ground-up design to yield 1GHz operation at 10 times less power than previous-generation processors," he said. "Tomorrow's chip will have the Centrino wireless circuits on board." And going forward in this direction "requires collaboration," Singer said.

IBM's Meyerson likewise emphasized precompetitive R&D. "We must think holistically about all the challenges and cooperate for the better good as we develop new technologies," he said.

Meyerson pointed to the numerous industry, academia, government consortia in which IBM plays a pivotal role, including its recently announced investment of $1.5 billion toward pursuit of technologies "beyond CMOS" in New York. The state is contributing another $140 million. Plans call for construction of a semiconductor packaging center in cooperation with the College of Nanoscale Science and Engineering, at the University of Albany, and Rensselaer Polytechnic Institute.

Precompetitive cooperation was the topic at the end of a full-day public meeting to vet key updates to the 2008 International Technology Roadmap for Semiconductors. The ITRS 2008 update will be posted online at the end of December after its final draft is approved in Seoul, South Korea, earlier that month.

Cooperative challenges
In the last panel discussion at the ITRS meet, titled "Can the value chain keep up with the roadmap?", session chair George Scalise, president of the Semiconductor Industry Association, called for cooperation among foundries, device makers and EDA tool providers. "It seems to me in view of the enormous costs, precompetitive R&D is a necessity. But how is that accomplished?" he asked.

Luc Van den Hove, chief operation officer of what is arguably the most successful global research consortium!IMEC, in Leuven, Belgium!had his own take on the subject. "We established centralized research platforms that allow members to share in, and to get what they need out of, to further pursue their competitive development on their own," he said.

At Semicon West, IMEC announced Qualcomm's participation in its 3D integration initiative. The technology research program focuses on three-dimensional wafer-level packaging and 3D stacked ICs, and will provide insights into the technology's benefits, costs, challenges and solutions. The effort also includes the development and demonstration of the intellectual property and tools necessary for designing in three dimensions.

"We are collaborating with IMEC because their research and technology expertise will help us to accelerate the implementation of 3D design in our products," said Jim Clifford, senior VP and general manager of Qualcomm CDMA technologies. Other partners in IMEC's 3D integration program are Amkor, Infineon, Intel, Micron, NEC, NXP, Panasonic, Qimonda, Samsung, STMicroelectronics, Texas Instruments and TSMC.

3D system-in-package design "is not well understood," said Ivo Bolsens, VP and chief technology officer at Xilinx Inc. "Cooperating with others in R&D is a good thing."

Claudine Simson, executive VP and chief technology officer at LSI Logic Corp., threw down the gauntlet to the foundries and EDA tool vendors on another cooperative challenge: "Open up your tools and modeling schemes so that we device producers can get our chips produced faster."

She called for cooperation among all interested parties on the front end of design as well as fab-to-fab interoperability. "It doesn't make sense for the industry as a whole to keep proprietary those things which can help in our overall productivity," Simson said. She got no argument from foundry Jazz Semiconductor's chairman and CEO, Gil Amelio. "We have to get rid of redundancies in the supply chain and we need to share the pain," he said. "To do so, we need to apply our funds smartly to common R&D projects, and then go on to differentiate our products for competitive purposes to our customers."

Of course, Amelio does not intend to give away the company's crown jewels. "We hold many, many patents on silicon germanium on which we spent good money developing this intellectual property, and which we cherish and do not intend to share," he said.

Walden Rhines, chairman and CEO of EDA tool provider Mentor Graphics Corp., agreed that it is difficult to share intellectual property developed in-house. "I think what will force the hand is when IP providers, as they become stronger, start forcing foundries to cooperate for the sake of their customers. ARM is already doing that," Rhines said.

- Nicolas Mokhoff
EE Times

Article Comments - Chip industry preps for 'More than M...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top