DFI initiative gets LSI, ST on board
Keywords:DDR interface? memory controller? PHY? DFI specification?
Representatives from the member companies plan to contribute to improvements and enhancements in the next version of the DFI specification. With the expanded technical working group, the ongoing development of the specification will continue to benefit PHY providers, chip architects and memory controller vendors, speeding their DDR memory system design and integration, reducing significant verification costs.
"Industry-accepted interface specifications simplify development and facilitate interoperability," said Don Friedberg, director of foundation IP solutions at LSI. "The DFI specification will help streamline the integration of memory interface PHYs with high-performance controllers.
"Parallel DRAM interfaces are increasingly becoming a performance driver for many of our SoC products in computer peripheral, consumer, telecom, and wireless applications," said Pierre Dautriche, AMS and PHY IPs director at ST. "It is therefore natural that ST joins the DFI standardization body, which will benefit our customers with higher performance in our DDR interfaces.
This current version of the specification, DFI 2.0 supports DDR1, DDR2, mobile and DDR3 memory; adds read, write, and gate training interfaces; and improves upon the interoperability features between the memory controller and a DDR PHY. The official version of the specification has been based on the 1.0 foundation of the common interface between DDR-DRAM memory controller logic designs and DDR DRAM physical interface designs. This specification offers designers a standard that has wide industry acceptance and ensures that the controller and PHY will work optimally together and no changes will be required to the hardened logic, resulting in reduced cost, time-to-market, and increasing reusable system IP.
"LSI and ST coming aboard as technical contributors to the next DFI specification represent the significant awareness and the importance of a standard interface between the controller and PHY," said Bryan Jones, who oversees corporate external IP management for Intel's mobility group. "Amidst the growing community of technology experts and interface users, the contributions from the expanded technical team will increase further industry adoption, technical advancement, and exciting opportunities."
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