Scrutinizing power-supply stability in a multiloop system
Keywords:power-supply stability? power converter? multiloop system? flyback converter?
ON Semiconductor
Analyzing a power system's stability usually begins with a look at the open-loop Bode plot of a buck or flyback converter's power stage. From this plot, the designer extracts phase and gain data for the frequency range of interest. His job is then to identify a compensator structure that will lead to the selected crossover frequency and the proper phase margin. The final step requires the study of the total loop gain, the power plant followed by the compensator, showing that the poles/zeros placed on the compensator ensure stability once the loop is closed. If this operation is rather straightforward with single loops, the operation becomes more complicated with converters implementing weighted feedback. Here's a technique suited to power converters with multiple feedback paths [1].
To get a feel for the technique, first consider an example in which we apply the TL431, which is a three-terminal programmable shunt regulator diode that includes a precision reference source and an error amplifier. The TL431 can be modeled as a multiple-loop feedback system. Figure 1 shows a TL431 classically wired in a type-2 configuration [2]. From this circuit, we identify so-called fast and slow lanes.
The loop gain of such a system could be measured by breaking the loop at the feedback point on the primary side (e.g., at the optocoupler's collector). Unfortunately, depending on a given converter's configuration, this solution can sometimes be difficult or hazardous to implement. The best technique is then to measure the loop gain from the secondary side. However, in some applications, an LC filter is often inserted between the fast and slow lane inputs to remove unwanted high frequency spikes, typical of a flyback converter (Figure 2).
Figure 1: Typical TL431 configuration (Click to view larger image) |
Figure 2: LC filter splits both lanes (Click to view larger image) |
We see from this configuration that the AC stimulus would split between the lanes, leading to a wrong result. Fortunately, we are dealing with a linear system and thus we can apply the superposition theorem. We first sweep the slow lane while keeping the fast lane to a bias level, totally disconnected from the output. A DC voltage supplied by an external source will do (Figure 3a). The precision of the 5V source is not relevant here as it only serves to bias the circuit. The AC source actually represents an injection transformer, classically used in loop stability studies. Our A and B probes go to a network analyzer which computes Eqs. 1 and 2, i.e., 20 log_{10} (B/A) and a loop gain of G_{1}(s)/(sR_{2}C_{1}).
Figure 3a: The fast lane is AC disconnected from the circuit; only the slow lane receives a stimulus (Click to view larger image) |
Figure 3b: Fast lane AC swept; slow lane DC biased (Click to view larger image) |
Once we save the plot, we change the configuration to the other input (Figure 3b). In this circuit, the upper R_{2} terminal is connected to a DC voltage whose value must equal the regulated voltage. Then we AC-sweep the fast lane's input. The DC adjustment might be a little difficult, given the TL431's open-loop gain and the circuit's sensitivity on an external bias. The network analyzer will compute 20 log_{10} (B/A) for the fast lane; this time it plots a loop gain equal to G_{1}(s).
Combining signals
Now we have both the plots of the slow and fast lanes on screen. How do we combine them? Can we just sum up the gain and phase diagrams, respectively expressed in dB and degrees? Certainly not. That would correspond to cascaded gain blocks and not paralleled paths. We need the vector sum of both output signals, which represents the combination of both loops. Using Euler notation, we can express the slow lane signal by a rotating vector affected by a module A1 and a phase _{1} (Eq. 3):
Using a similar notation, we can write the fast-lane expression (Eq. 4):
To reconstruct and plot the final gain curve combining both signals, i.e., the signal observed on the feedback pin once all loops are closed, we need the real and imaginary portions of the two lanes (Eqs. 5, 6). Then we need to add them.
The rotating vector representing their sum is of the following form (Eq. 7):
where we can now extract a module and an argument (Eqs, 8, 9):
Plotting 20log_{10} of Eq. 8 and the phase returned by Eq. 9 yields the Bode plot we are looking for.
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