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Breaking the gigahertz speed barrier with an automated flow using commercial standard cell libraries and memories

Posted: 22 Aug 2008 ?? ?Print Version ?Bookmark and Share

Keywords:core MIPS32 74K? memory cell library? flow automated?

Traditionally, developing a high performance embedded processor required a custom design methodology, hand-crafted libraries and memories, and a team of specialized layout and circuit designers dedicated to the design and implementation of the processor. MIPS Technologies and Synopsys have worked together to develop an automated design methodology based on IC Compiler for the next-generation MIPS32 74K core familyenabling SoC designers to achieve near-custom results exceeding 1GHz, using off-the-shelf 65nm process, libraries and memories. This paper highlights how the collaborative efforts of both companies resulted in an automated RTL-to-GDSII flow.

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