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FPGAs qualify for cars, low-power apps

Posted: 01 Sep 2008 ?? ?Print Version ?Bookmark and Share

Keywords:automotive? FPGA? PLD? mixed signal? DSP?

With the entire semiconductor industry in a state of flux and established markets offering little growth, programmable logic (PL) suppliers are exploring new opportunities. One of the promising markets that FPGA and CPLD vendors have been looking into is the automotive sector.

Electronics content in automobiles has skyrocketed over the past few years. A glance at the dashboard of any new vehicle tells you all you need to know. The AM/FM radio and CD player has morphed into an infotainment center that now offers MP3 audio, DVD playback, GPS navigation, hands-free cellphone access and even wireless Internet browsing.

Cyclone III FPGAs dissipate less than 0.5W in static mode.

Many of these new functions place a premium on fast IC reprogrammability, not only for entertainment, but also for engine control, driver assistance and other tasks. With feature sets and functions changing more rapidly than typical drawnout automotive design cycles, designers are now looking to replace ASICs and ASSPs with easily reconfigured FPGAs or CPLDs.

Not surprisingly, leading FPGA/CPLD vendors have been quickly modifying their product lines to take advantage of this growing opportunity. In February, Altera Corp. announced new automotive-grade versions of its FPGAs, CPLDs and structured ASICs. All of the new devices redesigned to meet the automotive industry's stringent quality standards. These include ISO/TS16949 compliance; testing to AEC-Q100 specifications; support for the industry's production part approval process (PPAP); and ability to support an operating junction temperature range from -40C to +125C. Altera also ensured its manufacturing partners were TS16949 certified and registered for wafer fabrication, packaging and test.

Earlier, rival Xilinx Inc. expanded its automotive product line with the launching of new automotive-qualified Spartan-3A DSP FPGAs. The idea behind these devices was to bring higher levels of I/O and higher-bandwidth DSP capabilities while lowering power use. New hybrid instrument clusters, for example, will need higher I/O counts to support analog gauges and LED lighting. They will also require advanced I/O capabilities to intelligently control displays. To meet these requirements, Xilinx's Automotive (XA) Spartan-3A devices combine up to 502 I/Os with up to 1.3 million system gates. They also offer compliance with networking standards such as CAN, Media-Oriented Systems Transport and FlexRay.

Demand for DSP
As automakers adopt radar, camera and lidar sensing technologies for applications such as night vision and lane departure warning systems, they will inevitably require more DSP capability. Xilinx's XA Spartan-3A DSP devices address this need by delivering more than 30 billion multiply-accumulate operations per second (GMACS) and 2,200Gbit/s memory bandwidth.

Lattice Semiconductor is on the automotive bandwagon as well. While the PLD, FPGA and CPLD vendor has been supplying the automotive market for some time, early this year it announced automotive-grade versions of its Power Manager II programmable mixed-signal devices. Designed to offer a complete power management solution for a PCB by combining an optimized set of programmable digital and analog functions, the ispPAC-POWR1014 and ispPAC-POWR1014A are qualified to meet the Automotive Electronics Council's AEC-Q100 standard. The devices also support PPAP.

Actel Corp. is another vendor targeting the automotive market for some time. The FPGA vendor announced last year that its low-power ProASIC product line met AEC-Q100, Grade 1 qualification as well as support for PPAP.

The automotive sector isn't the only new game in town. Markets that were once considered relatively limited opportunities, like military and aerospace, are looking better all the time. For space applications, for example, Xilinx announced a radiation-tolerant Virtex-4QV family of FPGAs. The four devices combine up to 200,000 logic cells, 10Mbits of RAM/FIFO, two PowerPC processor blocks with auxiliary processing unit controller, 512 DSP slices and four Ethernet MAC blocks in a single chip. The company also announced a new MIL-grade family of FPGAs for military and aerospace applications.

PL vendors are also focusing more of their development efforts on emerging low-power applications. Last year, Altera announced its Cyclone III family, a product line that the company claims consumes up to 7 percent less power than some competitive FPGAs.

Manufactured in a 65nm process from Taiwan Semiconductor Manufacturing Co. Ltd, the new devices can be configured with up to 119,088 logic elements, 3.9Mbits of memory and 288 multipliers for DSP applications while consuming less than 0.5W in static mode. Targeted at handset and other power-sensitive markets, the new family offers twice the density, three times the memory and more multipliers than its preceding 90nm Cyclone II devices. In March, Altera added a new, highly compact 8mm x 8mm packaging option for designers trying to pack maximum functionality into space-constrained footprints.

Lattice beefed up its product portfolio with some new CPLDs targeted at handheld and portable equipment developers. The ispMACH 4000ZE family offers standby current as low as 10?A and compact chipscale BGA packaging. The CPLDs are available in densities from 32 to 256 macrocells.

FPGAs like the Xilinx XA family address the I/O needs of automotive designs.

A new player has entered the low-power PL market. Startup SiliconBlue unveiled a family of single-chip, ultralow-power FPGAs expressly targeted at battery-powered, handheld applications. Manufactured in a 65nm standard CMOS process, these FPGAs embed their own non-volatile configuration memory on-chip, allowing designers to eliminate the external flash PROM required by traditional FPGAs and helping reduce board space requirements and cost. A proprietary low-power design, coupled with the 65nm process, allows SiliconBlue to deliver devices with operating current as low as 25?A. Logic capacity for the new devices ranges from 2K to 16K logic cells with I/O count from 128 to 384.

Actel targets power-conscious applications with new versions of its ProASIC FPGA. Offering 40 percent lower dynamic power and up to 90 percent lower static power, the devices combine power savings with relatively high 350MHz operation for applications in industrial, medical and scientific markets. Lower dynamic power is particularly important in portable video and medical applications where high-speed data pipelines require clocks to constantly switch and provide input to an FPGA. The four-member ProASIC3L family supports densities from 250K to three million gates.

- John Mayer
EE Times

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