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Dual-core processor enhances car navigation processing

Posted: 29 Aug 2008 ?? ?Print Version ?Bookmark and Share

Keywords:dual core? processor? 65nm? car navigation?

Renesas Technology Corp. has launched a new SH7786 dual-core processor fabricated with a 65nm process for high-performance multimedia equipment such as car navigation systems. It has an excellent system capacity reaching 1,920 MIPS (960 MIPS x 2, when operating at 533MHz) and ultrahigh-speed data transfer. The shipments will start in Japan by October 2008. The volume production will be ready to a wide base of consumers in 2009.

Earlier, Renesas has manufactured the 90nm SH7786 dual-core processor fabricated with a 90nm process having the same processing capability with the 65nm process product. What differentiates the two products is that the 65nm version has lower power use by employing finer process and ultrahigh-speed data transfer by integrating DDR3-SDRAM memory interface.

Main features of the new SH7786

  • It has a dual high-performance SH-4A CPU cores with processing power of 1,920 MIPS. The new processor has a dual SH-4A high-performance 32bit RISC CPU cores, each with a processing performance of 960 MIPS at 533MHz and has a maximum processing capacity of 1,920 MIPS. It can carry the high-speed processing of complex data necessary to comply with the next-gen car navigation systems' requirements providing graphical display capabilities, high-quality audio reproduction and image recognition.

    At the same time, the 65nm process employs lower power use and lower-heat generation. Three low-power modes can be specified independently for the two CPU cores and these minimize power use.

  • It has an on-chip DDR3-SDRAM memory interface and PCIe bus interfaces for ultrahigh-speed data transfers. The processor has a 32bit bus operating at 533MHz for easy connection to high-speed DDR3-SDRAM, providing ultrahigh-speed data transfer reaching 4.27GBps. In addition, multiple PCIe bus interfaces handling large-volume data transfer provide high-speed data throughput at up to 800MBps. This simplifies implementation of complex drawing such as smooth of complex and real 3D graphics.

    Earlier, 90nm dual processor products were working closely with DDR2-SDRAM with an operating voltage of 1.8 V. The 65nm versions support DDR3-SDRAM using an operating voltage of 1.5V. This permits lowering of power use in the overall system.

  • It has a development environment for design support of multicore systems. A version of the E10A-USB on-chip debugging emulator with multicore support is used as a development environment for the SH7786. It has a range of flexible simultaneous debugging functions such as simultaneous execution, simultaneous break and single-CPU break and reexecute.

    The new dual processor is managed by QNX Neutrino RTOS and the QNX Momentics development suite.

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