Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > EDA/IP
?
?
EDA/IP??

How far can EDA sustain losses?

Posted: 03 Sep 2008 ?? ?Print Version ?Bookmark and Share

Keywords:EDA market loss? semiconductor? foundry?

Four of the major EDA companies have shown the financial records for their respective quarter sales. Only Synopsys Inc. had a positive statistics, while Cadence Design Systems, Magma and Mentor Graphics Inc. all reported losses.

Several questions tend to surface: "What are the causes? How deep will the losses go? How long will the downturn prevail?" Forecasting is usually a tricky business. In this case, the near future behavior of the EDA industry is clearly visible. What is required is a reading of what the CEO of each of these companies is saying.

Market leaders' opinions
Aart de Geus, chairman and CEO, Synopsys, has proven to be an astute observer of the industry for many years. During the Web cast announcement of the results, he said: "The marketplace now is sending mixed signals. While chip volumes are rising, average selling price (ASP) pressure has been tough on IC growth. Lately, manufacturing capacity has begun to tighten up, and 1H semiconductor results were better than expected. With this uncertainty, we see some customers racing forward to gain market share, while others are holding back on their commitments. One common theme is caution and selectivity in choosing suppliers that they can count on for the future."

Mike Fister, chairman and CEO, Cadence, who had the dubious distinction of being the first to report the results said: "Although we achieved our Q2 numbers, it was more difficult than we planned. Customers are demanding more flexibility in when, what and how they can purchase software and hardware."

Rajeev Madhavan, CEO, Magma noted that: "The Q1 was more difficult than we expected. This was a situation that we believe may continue throughout a portion of the remainder of our fiscal year. Our key products and technology continue to deliver compelling solutions, but customers are experiencing softening demand in some of their end markets. We believe Q1 results reflected delays in their purchases of design software, as well as changes in our sales channel."

Only Wally Rhines, chairman and CEO, Mentor Graphics, was optimistic. He said: "Mentor Graphics continues to execute against its plan in an environment which remains challenging. Our young and innovative product portfolio has enabled the company to perform well as customers adopt new process nodes."

Looking back
To understand the essence of the given observations, we need to consider what the industry expectations have been for the last forty years. When Gordon Moore published his paper in 1965 predicting that the number of transistors on a silicon die would double every 18 months, he did not say for how long the trend would last. But the industry expected that the trend would be forever. In the last two years, the pundits officially allowed that both the time required to double the number of transistors would be more than two years, and that there might be an end to the trend because of physical limitations, since it is impossible to divide an atom in two while maintaining a non-explosive environment.

The prediction made in the International Technology Roadmap for Semiconductors, the bible of every EDA company, unfortunately continues to predict that the vast majority of IC vendors will move to the new available node within two years of its release.

This is seen incorrect and thus demand for new tools is less than expected. Since new tools are the ones that demand the highest license prices and produce the higher margin of profit, the EDA industry is facing a lower demand for its most profitable products. Also, each company is constrained to invest in R&D in servicing those customers that do need to take advantage of the latest available design and manufacturing capabilities.

Expected shift
Rhines is the only CEO who chose to focus on customers adopting new process nodes. Probably, this is brought by his largest revenue generator Calibre and the family of products closely related to it. If people do not stay at the leading edge of manufacturing technology, Calibre revenues will suffer. It is not a coincidence that Joe Sawicki, VP and general manager of the design-to-silicon division, Mentor, appearing on a panel at this year's DAC and confidently said that Moore's Law would continue at least until two more process nodes. It will perhaps for a handful of IC companies, most of whom have their own internal semiconductor manufacturing capabilities.

Market stressors
What are the factors that slowdown the adoption of new manufacturing capabilities? They can be both financial and technical.

It costs up to $5 billion to build, equip and prepare a manufacturing facility capable of handling 45nm technology, which is the process node used by leading companies when designing. Thus, IC companies with this technology must charge a reasonable price to recover from their investment. So the cost of a silicon die using the latest process is very expensive.

IC design companies divide the cost of a new product into two parts: nonrecurring and recurring. Recurring costs are those that are used to produce one functioning IC. Nonrecurring costs are incurred expenditures in the design and development of the product. These costs are escalating brought by the complexity not only of the IC contents, but also of the physical characteristics the product must have to be 'manufacturable.' It includes the shelf-life of a product that is on the average less than one year. It also takes a company to sell 100 million units to justify the investment of producing an IC using 65nm process technology and only a few firms afford to take such risks.

Growing complexities
Technically, producing a very complex IC challenges the limitations of human intellectual capability. Millions of transistors must work well to have a functional IC. Companies, aided by EDA vendors, have addressed the problem of complexity by increasing the level of abstraction engineers work on. This approach faces two problems. First, all the manufacturability of an IC often depends on the placement of transistors on the silicon and the EDA tools that transform an algorithmic representation of a design into a circuit description. These make the product 'manufacturable,' which up to now is either non-existent or not yet up to the task.

I do not want to put a limit to human ingenuity. We can solve the problem. But it will take much longer than expected. In the meantime, EDA vendors need to learn how to make money from customers they used to consider "laggers" in adopting manufacturing technology. We also need a new financial model for manufacturers, and we must start from accepting reality, not abandoning ourselves to the belief that Moore's Law will live forever. The capability might live for a few more years, but the practicality of using it has seen its limitation.

- Gabe Moretti
EE Times





Article Comments - How far can EDA sustain losses?
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top