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IP core enhances capacity of next IEEE standard

Posted: 05 Sep 2008 ?? ?Print Version ?Bookmark and Share

Keywords:IP core? IEEE? semiconductor? hardware?

IPextreme Inc. has announced what it claims as the industry's first synthesizable IP core that will manage the upcoming IEEE 1149.7 standard. This will be in volume production by early 2009. The cJTAG-IEEE 1149.7 IP core is a configurable, ready-to-integrate semiconductor IP solution that backs all six classes of the IEEE 1149.7 standard.

It will provide designers with powerful extensions to the current IEEE 1149.1 (JTAG) standard. It has fewer pins and maintains compatibility with IEEE 1149.1-based hardware and software. "The IEEE 1149.7 test and debug technology will allow the electronics industry to extend IEEE 1149.1 capabilities, while also offering increased functionality to their embedded designs," said Stephen Lau, emulation technology product manager, Texas Instruments Inc.

Key features of the new IP core

  • Support for IEEE 1149.7 classes 0-5 (selected through hardware configuration parameter)

  • Partitioned along IEEE 1149.7-specified functional boundaries [extended processing unit (EPU) for class 0-3 operation and advanced processing unit (APU) for class 4-5 operation, further parameterization within EPU and APU for class-specific and optional features and separate blocks for clock and reset signal conditioning.]

  • Supports all mandatory and optional scan formats such as JScan0-3, SScan0-3, OScan0-7 and MScan

  • Supports all mandatory and optional commands

  • Firewall provides robust hot-connection by disabling test clock until firewall is disabled by the debug test system

-Gina Roos

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