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ESL EDA platform slashes design time in half

Posted: 18 Sep 2008 ?? ?Print Version ?Bookmark and Share

Keywords:ESL? EDA? platform design time?

From Agilent Technologies Inc. comes the SystemVue 2008, a new EDA platform for electronic system-level (ESL) design. The new platform cuts PHY design time in half for high-performance communications algorithms and system architectures, for both wireless and aerospace/defense applications, says the company.

According to Agilent, the SystemVue 2008 provides an easy-to-use environment with innovative simulator and modeling technologies, along with links to hardware implementation and test. It allows algorithm creation and prototyping for challenging communications system architectures at the physical layer. SystemVue bridges an important design flow gap between algorithm developers and the mainstream design community and lowers the cost of ownership by unifying a disjointed flow at an affordable price. SystemVue complements existing general-purpose EDA tools used to design fFPGAs, digital signal processors, ASICs and analog/RF components.

SystemVue 2008 is suited to system architects of high-performance PHYs as well as to algorithm developers for emerging wireless PHYs, such as 3GPP LTE. Aerospace/defense applications, such as software-defined radio (SDR), satellite communications and radar will also benefit from SystemVue 2008, claims Agilent.

The SystemVue 2008 is expected to be available in November, with prices starting at approximately $14,000.

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