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Tensilica users receive IP core supports from Aftek

Posted: 25 Sep 2008 ?? ?Print Version ?Bookmark and Share

Keywords:Aftek IP core? interface I2C?

Three IP cores from India-based IC design and embedded systems service house Aftek Ltd are designed to support Tensilica users and speed up time-to-market of SoC design based on Tensilica processor cores.

The PIF-12C core bridges PIF System interface (Tensilica processor interface) and I?C interface. The controller can be used in SoC applications using Tensilica Xtensa or Diamond processor.

The PIF-SPI core provides a data communication channel between a PIF and an SPI device. This bus bridge provides high speed access from a PIF master to an SPI slave. The SPI master is a full duplex, serial data link that is standard across several processors and peripherals. It enables data communication between processor and a peripheral or between processors. This can be extended to select four slaves. The master can transmit data at different baud rates up to 60Mbit/s.

The PIF-UART interface core is typically used for connectivity between systems or as a debug port.





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