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Uncovering the Cdv/dt shoot-through

Posted: 03 Oct 2008 ?? ?Print Version ?Bookmark and Share

Keywords:MOSFET? capacitance? circuit?

By Stefano Finocchiaro
Application Engineer, Power MOSFET Division, IMS

During a fast commutation in a half-bridge topology, a temporary short circuit can happen. This event is called Cdv/dt shoot-through. This is linked to a fast voltage variation across one of the two MOSFETs. A current flowing through the gate-drain capacitance can bring the Vgs of a MOSFET, when turned off, to raise and obtain a cross conduction into the leg. This paper addresses the internal MOSFET parameters affecting the phenomenon (capacitance, gate charge, transconductance, threshold voltage), and highlight by means of test results and simulations the results of turning off the MOSFET circuit.

Cdv/dt shoot-through

Consider a half-bridge topology. During a normal hard-switched commutation, one of the two MOSFETs, e.g. the high side (HS) has been turned off and the other side, the low side (LS), is turned on. In the turned on LS MOSFET, the drain to source voltage across the devices changes rapidly. The Cdv/dt shoot-through phenomenon is linked to the fast voltage variations across the HS device. Observing Figure 1, you can see that whenever a high dv/dt is applied between the HS MOSFET drain and source pins, the gate to drain capacitance (Cgd) is rapidly charged, so it is crossed by a significant current I = Cgd dv/dt.

Figure 1: This is the equivalent circuit showing Cdv/dt shoot-through.

A part of this current, this flows cross the gate resistance (Rgint + Rgext) and the remaining through the gate to source capacitance (Cgs). The current component flowing in Cgs causes the gate voltage to increase, which can turn on the MOSFET even though it is supposed to be off (see Figure 2). As this event occurs, the HA or LS or both MOSFETs, placed in the same leg, are being conducted and hence produce a short through in the leg itself. This implies further energy losses and, in extreme conditions, can bring the devices to a failure.

Figure 2: These are the waveforms related to a Cdv/dt shoot-through event.

Parameters involved

Identify some parameters in the Cdv/dt phenomenon. Let�s consider an approximate model of the MOSFET during the Cdv/dt event before the spurious induced turn on occurs. This means any current drain is flowing through the channel as seen in Figure 3.

Figure 3: This shows the approximated MOSFET model.

Rg int is the real part of impedance showed by MOSFET to an input variable signal on the gate pin.

Rg ext is the lump sum of the external off-circuit (resistors, diodes, transistors etc.), driver sink resistance and parasitic resistance (caused by contacts, layout etc.).

The circuit reported in Figure 3 is a simple R-C circuit, so we can directly identify all nodes and loop equations:



Where Rt = Rgext + Rg int. Taking Vgd from (2) into the equation (1) we can get:


We can assume the drain to source voltage applied cross the high side MOSFET like a linear ramp, seen in Figure 4.

Figure 4: This shows the approximated Vds waveform.

Rearranging the (3) and substituting dv/dt = Vbulk/Ton, we have:


By solving the previous linear differential equation in terms of Vgs (assuming capacitance constant by changing the Vds),


Find first the Vgs maximum point in relation to the time variable by calculating the first-order derivative and imposing it is equal to zero. With this, we can get:


In a practical condition, Vbulk is several hundreds voltage; since at t?Ton, the Vds?Vbulk we can assume Cgd and Cgs at a stable value.

But what does an induced Vgs spike mean? We could affirm that a Vgs spike higher than the Vth value can turn on the MOSFET. We must note the straight link between drain current and Vth concept. We use Vth as a defined gate to source voltage that is capable to initiate a channel current flow.

Because of this, in all data sheets, the Vth value is jointly reported to the related current drain.

In the datasheets, the Vgs(th) value is usually measured at few ?A drain current to indicate when the MOSFET channel can be considered �turned on.?

To better explain the phenomena, we assume that the HS Vds is fixed by turning on LS MOSFET. This is true until Vgs spikes on the HS are not that high.

At a fixed induced Vgs value, higher than the Vth, for instance, the HS MOSFET can handle a fixed current working. Since the LS is turned on, the Vds across the HS, one is forced to be high forcing the HS MOSFET to work in a saturation region. The supply current flow through both devices is the so-called shoot-through event. The MOSFETs are forced to dissipate higher energy quantity.

Figure 5: MOSFET is working in the saturation region.

To know the current variation related to a Vgs variation, at fixed Vds, is important. The MOSFET parameter summarizing this feature is the gfs (Figure 6).

Figure 6: This shows how gfs is defined.

A device with high gfs will be more sensible from a shoot-through point-of-view.

In technical literature, you can find that an essential parameter related to the Cdv/dt shoot-through is the Qgd/Qgsth ratio, where the Qgsth is the Qgs necessary for the MOSFET to reach a fixed Vgs value, and capable of handling a fixed current. To avoid a shoot-through, the Qgd/Qgsth ratio should be One crucial parameter is the Vth. It has a higher Vth, more difficult to handle current, and rarer than the shoot-through. At fixed Vgs spike, MOSFETs with higher Vth allow weaker flow current.

Another intrinsic parameter involved is Rgint. It is a component of the impedance gate-source. The lower Rgint, the rarer the shoot-through will be.

An intrinsic parameter with more practical sense is the capacitance (Cgd). During the transition, a high Cgd shows a low impedance, so the current spike flows through the parallel between Rt and Cgs (see Figure 3) is high , and so as the Vgs spike. In Figure 7, the relationship between maximum Vgs spike and Cgd, from Equation 6 is shown. It is better to have low Cgd value.

Figure 7: This shows the relationship between maximum Vgs spike and Cgd based on Equation 6.

There are many internal MOSFET parameters affecting the shoot-through performance. We have compared two-line devices with similar Qgd/Qgs ratio but different parameters, see Table 1. We have performed some analysis using the circuit shown in Figure 8. We have measured the amplitude of the current spike flowing through the HS MOSFET, affected by Vgs induced spike.

Figure 8: This is the simple circuit test.

Table 1 This is the MOSFET under test�s electrical parameters.

Figure 9: This is the I peak value measured in the test.

At low Rg ext value, the peak current value is stable. The current is related to the HS Coss charge (and LS Coss discharge) and hence is not linked to the shoot- through. When values begin to raise shoot-through, contribute is overcoming the Coss charge current. The Coss current is flowing merely through capacitances where as the shoot-through current flows cross the channel MOSFET. Device B, even though has lowest Qgd/Qgs ratio, is more susceptible to shoot-through. Furthermore, the Qgd/Qgs ratio is also related to a current value, and so as the other parameters depending of drain current, like gfs, Vth.

We have measured the Qgd/Qgs of two-line devices by varying the drain current. Results are shown in Figure 10.

Figure 10: This shows Qgd/Qgs at different drain currents.

The Qgd/Qgs seems to have a linear behavior versus the drain current switched. The slopes of the two straight lines are different so we can say that a current value exists where the two lines behaviors are inverted.

To prevent the shoot-through event by evaluating the internal MOSFET parameter is very difficult.

There are many intrinsic parameters affecting the MOSFET from a shoot-through point-of-view. Unfortunately, most of them are interconnected. Changing the internal parameters to augment the shoot-through immunity cannot satisfy other instances related to other stresses or work conditions.

Because of this, from a design point-of-view, it is essential to reduce the external conditions by increasing shoot-through noise. The external parameter having a strong impact to the Cdv/dt induced Vgs spikes is Rgext, that is the overall resistance between gate and MOSFET source pins. Rgextis the total of many contributes related to turning off circuit, driver output resistance and layout resistance.

We have changed the Roff of HS MOSFET and the Ron of LS to speed up the transition and by simulation we have recorded results seen in Figure 11.

Figure 11: This shows the relationship between maximum Vgs spike and Roff at fixed dv/dt.

Roff is fundamental to reduce the shoot-through spikes. It is also suggested to design a driving circuit that considers the shoot-through issue.

There are other driving solutions eliminating the issue like the ac coupled gate drive (this is when the MOSFET is turned off, its gate is blocked under source potential), but we want to end the Roff rule because it is the most commonly used method when turning off.

We can�t base our shoot-through evaluation only on the Qgd/Qgs ratio, but we must consider many other parameters.

From our experience, we believe you can get the whole picture about this issue when your application is completely assembled. With this, you can evaluate, only by measurements the Roff impact on a possible shoot-through event and remove it by testing it on-board.

- Stefano Finocchiaro

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