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IBM 'fab club' details foundry roadmap

Posted: 03 Oct 2008 ?? ?Print Version ?Bookmark and Share

Keywords:IBM 28nm node? fab club roadmap? 45nm process?

IBM Corp.'s "fab club" has outlined its foundry process road map including a 28nm "half-node" technology, and, in some cases, positioned its 32nm offering as a better alternative to 40nm.

At the same time, IBM and its partners are also investigating the 15nm node and beyond. It is researching non-traditional devices like carbon nanotubes, FinFETs, thin silicon-on-insulator (SOI) products, among others, said Gary Patton, VP for IBM's Semiconductor Research and Development Center.

But at present, IBM and its foundry partners, Chartered Semiconductor Manufacturing Pte Ltd and Samsung Electronics Co. Ltd, are shipping 65nm designs.

Chartered, IBM and Samsung are or will shortly ship 45nm wafers. Chartered plans to develop and ship a 40nm "half-node" process, while IBM and Samsung are not pursuing that technology. In comparison, TSMC and UMC are separately developing both a 45- and 40nm process.

But due to economic and other factors, the overall demand for 40nm technology is relatively sluggish and the mass production ramp "has slipped out" for the entire industry, Patton said.

Instead of 45-/40nm technology, Patton dropped hints that there is a more compelling reason to skip the 40nm node and move to 32nm, namely to IBM's technology.

IBM and its partners are making a huge push for their 32nm technology, which includes high-k and metal gates for the gate stack. Instead of traditional low-k dielectrics, the 32nm process is said to make use of IBM's previously-announced "air-gap" technology. The process will also make use of 193nm immersion lithography, copper interconnects and strained silicon.

For 32nm, IBM and its partners plan to offer separate low-power and general-purpose technologies, possibly by the end of 2009. Then, at least one partner, Chartered, plans to develop a 28nm "half-node" technology. The 28nm process is due out "six months after 32nm," Patton said.

In contrast, Chartered's rival, TSMC, considers 28nm a "full-node" process. TSMC considers 32nm a cost-down version of 40nm.

IBM and its partners are also developing a 22nm process in R&D, with 15nm technology in the labs. For 22nm, IBM's "fab club" is developing its next-generation high-k/metal-gate technology and will reportedly make use of its air-gap scheme.

It will also use its previously-announced "computational scaling" technology for lithography at 22nm. At present, there are no next-generation lithography solutions ready for 22nm, forcing IBM and others to extend 193nm immersion.

The 22nm process may be the end of the road for planar structures. It may require new structures like FinFETs and related devices, Patton said.

- Mark LaPedus
EE Times

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