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Data converters herald wide bandwidth, low power

Posted: 16 Oct 2008 ?? ?Print Version ?Bookmark and Share

Keywords:data converter? bandwidth wide? power low?

From Texas Instruments Inc. comes six 12bit and 14bit analog-to-digital converters (ADCs) with sampling rates as high as 250 MSPS (mega samples per second) to deliver a combination of wide signal bandwidth, high dynamic performance and low power consumption, enabling more efficient power amplifier linearization in digital pre-distortion (DPD) solutions, better range and sensitivity in radar and defense electronics and greater accuracy in high-speed test and measurement equipment.

With 14bit performance, the ADS6149 is the highest resolution 250 MSPS ADC in production, providing designers with maximum performance along with low power consumption, says TI.

The ADS6149 and buffered input ADS61B49 offer the industry's highest dynamic performance at 250 MSPS with greater than 70dB signal-to-noise ratio (SNR) and 80dB spurious-free dynamic range (SFDR) for input frequencies ranging from DC to 250MHz. At the maximum sample rate of 250 MSPS, the ADS6149 consumes only 687mW. At a sample rate of 150 MSPS, with dynamic power scaling, the device consumes as little 490mW.

The complete ADS61xx family of devices is highly flexible, which makes it easier for designers to maximize performance for their specific application. A 1dB to 6dB programmable gain option allows customers to optimize SNR, SFDR and input swing based on the unique needs of their application. For instance, designers can maximize SNR to enhance linearization effectiveness in DPD solutions, while SFDR can be increased and input drive reduced to improve small-signal analysis in defense and radio receiver applications. To further enhance flexibility, the ADS61B49 and ADS61B29 ease analog front end design by incorporating a fully differential input buffer. This buffer provides constant input impedance over input frequency and eliminates kickback from the ADC's track-and-hold circuit to ensure consistent linearity of the signal. And to provide a flexible digital interface, the ADS61xx family of devices features user-selectable parallel CMOS or differential double data rate (DDR) LVDS output options.

TI offers a wide variety of devices to complete the signal chain, including those listed below to maximize performance, ease design and speed time-to-market. The devices are pin-compatible with previous-generation high-speed devices including the ADS5547/27.

The ADS6149 and ADS6129 are available today in a small 7mm x 7mm, 48-pin QFN package. The remaining four pin-compatible members of the ADS61xx family will release to production over the remainder of 2008. In addition, TI will offer a complete line of evaluation modules for the entire family of ADCs. Customers can also use TI's TSW1200 digital capture tool for rapid evaluation of ADCs of up to 16bit resolution and 500 MSPS sample rates to further speed development time.

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