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Clock multiplier with 5ps jitter targets consumer apps

Posted: 21 Oct 2008 ?? ?Print Version ?Bookmark and Share

Keywords:jitter performance? clock multiplier? consumer applications?

NB3N3020

ON Semiconductor has launched the NB3N3020, a high precision, low phase noise, programmable clock multiplier offering what it claims to be the best jitter performance. The device has period jitter of 5 picoseconds (ps) resulting in more system timing margin for board designers, higher frequency designs and higher reliability.

The device generates an low-voltage positive emitter coupled logic (LVPECL) clock, as well as LVCMOS clock on the same device which enables the NB3N3020 to be used in a wide range of applications including networking, consumer electronics and computing applications. The device has three tri-level LVCMOS single ended select pins that set one of 26 possible clock frequencies allowing flexibility for the designer to meet requirements and replace many clocks in different systems with a single custom-tailored device.

In addition, the NB3N3020 programmable clock multiplier has a wide output frequency range from 8MHz to 210MHz. It takes a 5- to 27MHz fundamental mode parallel resonant crystal or a 2- to 210MHz LVCMOS single ended clock source and generates a differential LVPECL output and a single-ended LVCMOS output at a selectable clock output frequency which is a multiple of the input clock frequency. The LVCMOS output enables tri-states clock outputs when low, allowing system designers to dynamically control the presence of clock timing in their systems.

The NB3N3020 is available in a 5mm x 4.4mm TSSOP-16 package with a budgetary price of $3.50.





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