Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > Manufacturing/Packaging
?
?
Manufacturing/Packaging??

Fab tech roll call: survival of the fittest

Posted: 17 Nov 2008 ?? ?Print Version ?Bookmark and Share

Keywords:semiconductor equipment? foundry IC? fab tool?

There's trouble brewing in chipmaking paradise. Manufacturers are rolling out 45nm ICs, with 32nm designs in the works; 22nm and even smaller devices are in R&D. But delivery of chips at 32nm and beyond won't be a cool breeze.

The following lists 10 fab technologies that could make or break future IC scaling. These technologies represent what we consider the biggest barriers to next-generation chip manufacturing.

1. Fab-tool supply chain
The entire semiconductor-equipment supply chain is under pressure. First, there is an R&D funding gap. Many fab-tool vendors can't afford to develop next-generation gear. And even if they develop new tools, the return-on-investment is questionable.

Vendors are also in the midst of a downturn. Fab equipment spending is expected to fall 20 percent in 2008, according to SEMI. This means more industry consolidation. And if that isn't enough, the sector is facing a wave of hostile takeovers, leaving chipmakers jittery about their tool suppliers.

Sumitomo Corp. made a hostile bid to acquire Axcelis Technologies Inc., but subsequently backed away from the plan. Aquest Systems Corp. is going after Asyst Technologies Inc. And Applied Materials Inc. made an unfriendly bid to buy ASM International NV.

Bottom line: Innovation will suffer because vendors are too worried about their survival to devise breakthrough products. Tool vendors can run, but they can't hide.

2. Foundry model
Silicon foundries play a pivotal role in the industry, but there are signs that the chip outsourcing model is cracking and may even be broken. Leading-edge foundries are falling behind Moore's Law and finding themselves stretched too thin. Many IDMs are moving toward a fab-lite model and relying more on foundries. This puts more stress on the foundries to handle both fabless and IDM production requirements.

The fabless approach is also under pressure. "As Taiwan Semiconductor Manufacturing Co. Ltd ramps new technology nodes, it builds out less and less capacity," said Doug Freedman, an analyst at American Technology Research Inc. "Too much risk. And when it moves to 40nm, the problem will become worse. The fabless business model seems to be getting stressed out."

Word on the street is that TSMC customers have delayed their 45nm/40nm devices. Rivals Chartered, UMC and SMIC are behind the process curve. Most smaller foundries are losing money. And consolidation is accelerating. Can the foundries stay above water? If not, the IDMs may have to re-think their fab-lite strategies, jettison their foundry plans and build new fabs again.

Bottom line: Foundries won't go away, but the IDM model could slowly make a comeback.

Intel has shipped a logic design based on both high-k and metal gate.

3. High-k/metal gates
IC scaling is in danger of hitting the wall. One problem is the gate dielectric in leading-edge logic designs. The current material, silicon dioxide, is running out of gas.

But despite a slew of announcements from other vendors, Intel Corp. is still the only chipmaker to ship a logic design, based on both high-k and metal gates. Intel is crushing the competition, thanks in part to high-k.

AMD, IBM and others have talked about high-k, but they have yet to deliver. The foundries!Chartered, TSMC and UMC!hope to offer high-k at 32nm, but will they come through?

Bottom line: Expect major delays!high-k is a disruptive technology, but if vendors can't ship it, it could truly disrupt the industry.

4. 450mm fabs
In the 1990s, the IC industry made a transition from 200mm to 300mm fabs, and pushed chip-equipment makers to develop 300mm tools. The tools were ready, but the IC makers delayed their 300mm fabs, leaving the toolmakers out millions of dollars. Eventually, 300mm went mainstream, but tool vendors still remember being burned.

Now, the IC industry!particularly Intel, Samsung and TSMC!wants to make the transition to 450mm fabs by 2012 or so. Probably wishful thinking. Many fab-tool vendors refuse to develop 450mm tools; they can't afford it. Eventually, Intel may twist tool vendors' arms to devise 450mm gear. But the transition could bankrupt the fab-tool industry.

Bottom line: Perhaps Intel and others ought to consider building their own 450mm equipment. After all, only Intel can truly afford 450mm fabs. But even Intel doesn't want to foot the bill.

5. EUV lithography
Once upon a time, optical lithography was supposed to run out of gas. So, in the 1990s, Intel spearheaded a consortium in EUV lithography. EUV was anticipated to be in production at the 65nm node by 2007. But EUV has run into several delays, due to lack of power sources and resists. Now, EUV is targeted for the latter part of the 22nm node or the 16nm node. Some do not believe the technology is feasible until 2016.

ASML Holding NV and Nikon Corp. are separately developing EUV tools for production fabs, but time is running out. Don't be surprised if these vendors ship some form of EUV tools within five years!at lower throughputs than originally envisioned. The question is, can anyone afford it? An EUV tool could run $100 million or more per unit!that's more than the cost of a Boeing 737, noted Risto Puhakka, president of VLSI Research Inc.

Bottom line: A fairy-tale ending is unlikely.

6. Nano-imprint lithography
In 2002, the fledgling nano-imprint lithography industry held one of its first public forums. The consensus among vendors: Nano-imprint!which resembles a hot embossing process!would displace conventional optical lithography and take over the world.

To date, nano-imprint has gained some traction in universities for research. It has shown promise in the production of disk drives and LEDs.

But nano-imprint has not displaced optical lithography in IC fabs, due to nagging alignment and throughput concerns. Startup Molecular Imprints Inc. is pushing hard to crack the IC market; it has even sold a machine to Toshiba Corp. But nano-imprint is fast becoming a niche technology. Expect consolidation in this small, overcrowded equipment market.

Bottom line: If someone does get nano-imprint to work right, sell your shares in ASML, Nikon and other conventional optical litho players.

EUV has run into several delays, due to lack of power sources and resists.

7. Maskless lithography
Years ago, IBM pioneered direct-write, electron-beam lithography for use in developing ICs. The advantage with direct-write is clear: it does not require a photomask. While direct-write is still used in niche applications such as compound semiconductors, the technology is generally too expensive and slow for today's chips.

Enter second-generation direct-write!sometimes called maskless lithography or ML2. This technology uses multiple beams of light to process a wafer, thereby boosting throughput. The problem? No one has delivered a real ML2 system despite years' of announcements.

The technology is complicated and exotic. One chipmaker, TSMC, is banking on maskless lithography for future ASIC production. It has invested in a startup called Mapper Lithography BV. But the industry may have to wait for next-generation ML3 gear.

Bottom line: Don't hold your breath.

8. 3D chips
Chipscaling could hit the wall, some experts say, possibly at the 16nm node. Even now, many worry that ICs' internal interconnects will become too compact, causing "resistivity." To solve the problem, some believe, the industry must stack standard chips in a 3D configuration and connect them by thru-silicon vias (TSVs).

TSVs are the talk of the town, but few products have been rolled out. Why? There's a lingering lack of EDA tools for TSVs. There's also a pending battle over who will make TSV-based chips: the foundries, IC assemblers or IDMs. Cost is a big question as well.

Bottom line: TSV-based chips are expected to hit the market in 2009, but they won't go mainstream any time soon. Wire-bonding, chip-scale, flip-chip and other mainstream packaging technologies are here to stay.

9. Design-for-manufacturing
DFM doesn't generate the buzz it did two years ago, largely because most DFM startups have been snapped up by the big EDA vendors. We now know DFM is the province of EDA (not foundries or lithographers). And we know chipmakers augment DFM with at least some restrictive design rules at 45nm and beyond, according to Gary Smith, chief analyst at Gary Smith EDA.

So what challenges are left in the DFM arena? "The DFM problem is so large you need to go to supercomputer parallel processing just to run these tools," Smith said. "That's still a big challenge. Most companies are using multithreading, which may run out of steam."

EDA companies are divided into two camps, Smith said: One claims we've entered the realm of supercomputing and need to start writing apps in Fortran; the other says we can still use C and multithreading.

Bottom line: It remains to be seen how this battle will play out, but it could bifurcate the industry.

10. Semiconductor gases and chemicals
The semiconductor gas and chemicals industry generally falls under the radar. Yet in the fab, every chip is processed with chemicals and gases, including helium, hydrogen, oxygen and silane.

Recently, reports of shortages of select gases, particularly helium and silane, surfaced. Worse, citing a jump in fuel costs since gases are transferred to the fabs by truck, Air Products and Chemicals Inc., Air Liquide and others have raised prices.

Bottom line: The big IC makers may be able to absorb the chemical price hikes, but smaller chipmakers are in trouble. IC manufacturers and gas suppliers could be headed toward a showdown-especially when the market picks up.

- Mark LaPedus
EE Times





Article Comments - Fab tech roll call: survival of the ...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top