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New tech responds to 40nm, 65nm design needs

Posted: 17 Nov 2008 ?? ?Print Version ?Bookmark and Share

Keywords:ASIC? 40nm? 65nm? processor?

Fabless ASIC company Open-Silicon Inc. has released new technologies to address design issues common to the 40nm and 65nm nodes. Based on customer's needs, Open-Silicon said it will use the PowerMAX, CoreMAX and VariMAX technologies to build better custom silicon by designing in lower power, increased performance and managed process variability.

"By combining the ASIC industry's only transistor-level optimization flow with techniques like back biasing, which are new to the ASIC space, Open-Silicon can build the best possible fully customized silicon in smaller process geometries," said Satya Gupta, VP, engineering and co-founder of Open-Silicon, in a statement.

The company said CoreMAX was created to build the fastest processor cores in the ASIC world. It added that the technology comes out of the Open-Silicon acquisition of Zenasis Technologies in 2007 and uses more than two million lines of C++ software and several patented techniques to move beyond the limitations of traditional library-based ASIC design.

It noted that built-in CoreMAX functions include design Boolean analysis and optimization, static timing, cell placement, route estimation and simultaneous optimization at the logical, physical, and transistor levels.

"VariMAX addresses increasing process variability with a back biasing design approach where the bulk transistor node voltage is controlled so that fast, leaky parts are reined in by adaptive calibration of the silicon," Open-Silicon said.

PowerMAX emphasizes low power. Open-Silicon said it has already completed state-of-the-art 65nm designs using power savings methods like low-power place-and-route, voltage islands, power gating, clock gating, and multi-Vt. PowerMAX adds to this foundation with four new technologies: transistor level transformations, back biasing, power recovery, and custom leakage signoff, the company added.

All products are available for design use today, it noted.

- Dylan McGrath
EE Times





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