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CMSIS allows flexible programming in MCUs

Posted: 21 Nov 2008 ?? ?Print Version ?Bookmark and Share

Keywords:interface? processor? software?

ARM Inc. has released the ARM Cortex Microcontroller Software Interface Standard (CMSIS), a vendor-independent hardware abstraction layer for the Cortex-M processor series. The CMSIS allows consistent and simple software interfaces to the processor for silicon vendors and middleware providers, easing software reuse, reducing the learning curve for new MCU developers and hastening the time-to-market for new devices.

What will interest readers of Programmable Logic DesignLine is that CMSIS will fit Cortex-M1 and other Cortex M-profile variants, because the Cortex-M1 is tailored and optimized for FPGA-based implementation.

Developing software is recognized as a major cost-factor by the embedded industry. By standardizing the software interfaces across all Cortex silicon vendor products, the cost is significantly reduced, especially when creating projects for new devices or migrating existing software to a Cortex processor-based MCU from other silicon vendors.

The creation of the CMSIS helps silicon vendors to focus their resources on the differentiating peripheral features of their products, and eliminates the need to maintain their own individual and incompatible standards for programming an MCU.

The CMSIS has been made in collaboration with some key silicon and software vendors including Atmel Corp., IAR Systems, KEIL Equipment Co. Inc., Luminary Micro Inc., Micrium Inc., NXP Semiconductors, SEGGER Microcontroller GmbH and STMicroelectronics. This partnership, along with feedback from past solutions, has resulted in a handy and user-friendly programming interface for Cortex processor-based devices.

The standard has been created to be fully scalable to ensure that it is compatible to all Cortex-M processor series MCUs from the smallest 8Kbyte device up to devices with sophisticated communication peripherals such as Ethernet or USB-on-the-go. The CMSIS memory requirement for the Core Peripheral Access Layer is less than 1Kbyte code, less then 10bytes RAM.

In the future, ARM seeks to extend the CMSIS with a Middleware Access Layer that has standard software interfaces for Ethernet, SD/MMC, and a debug interface for consistent kernel-aware debugging of RTOS kernels. This extension to the CMSIS will ease the deployment of standard middleware components on new Cortex processor-based MCUs.

- Clive Maxfield
Programmable Logic DesignLine

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