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Low latency driver to access external EEPROM using PIC18 family devices

Posted: 18 Dec 2008 ?? ?Print Version ?Bookmark and Share

Keywords:driver low latency? EEPROM? PIC18 device? application note?

This application note is developed based on low latency design. It provides an algorithm, which is designed to use the SPI/I&3178;C interrupts, to achieve the required communication and enable optimum processor usage. The algorithm is developed based on the PIC18 Master Synchronous Serial Port (MSSP) module with external SPIs EEPROMs and I&3178;C EEPROMs, respectively. The algorithm uses an interrupt driven approach.

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