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Firms gear for EUV litho despite tool delay

Posted: 26 Feb 2009 ?? ?Print Version ?Bookmark and Share

Keywords:extreme ultraviolet? EUV lithography? ASML tool delay?

ASML Holding NV (ASML) has slightly delayed the delivery schedule for its "pre-production" extreme ultraviolet (EUV) lithography tool by a quarter or so.

Despite a minor slip, ASML of the Netherlands claims that it has processed 28nm devices with its R&D EUV lithography tool. With that and future tools, Advanced Micro Device Inc., IBM and others are launching a new effort in EUV. The companies are developing a 22nm "test chip," with plans to embark on a similar program at the 15nm node.

EUV, however, is not targeted for production until the 15nm node in 2013 or 2014, said Obert Wood, a lithographer from AMD, during a presentation at the SPIE Advanced Lithography conference.

At present, ASML has separate EUV "alpha demo tools" installed at IMEC in Belgium and Sematech in Albany, N.Y. Those R&D EUV tools have an NA of 0.25.

A next-generation "pre-production" EUV tool was supposed to be shipped by late-2009 or early-2010. That tool has an NA of 0.25 and a 4nm overlay.

Now, the "pre-production" tool will be shipped by mid-2010, said Hans Meiling, ASML's product marketing manager for EUV systems. "It is taking a lot more work than we originally thought," he said.

Still, ASML has five orders for the tool, reportedly including from IMEC, Samsung, Sematech, among others. Nikon Corp. is also developing EUV. An EUV tool could run for $60 million or more each.

Will if take off?
Leading-edge chipmakers hope to insert EUV lithography at the later stages of the 22nm node, but it is more likely that vendors will use the technology at the 16nm node (26- to 30nm half-pitch) in 2013 or so.

Some say EUV won't be used until 2016. Others say it won't work at all. Originally, EUV was targeted for the 65nm node, but the technology has been pushed out due to the lack of power sources, resists, defect-free masks and other technologies.

ASML is moving full speed ahead with the technology. "We're making very nice progress," Meiling said during a presentation.

He said that the company's alpha EUV tool has demonstrated 28nm lines and spaces. The images were accomplished by IMEC and Sematech. In comparison, AMD last year demonstrated the ability to produce a 45nm device with ASML's R&D tool.

In a paper at this year's event, AMD's Wood said a more realistic goal is to bring EUV into production for the 15nm node in 2013 or 2014. The paper also was co-authored by ASML, IBM and TEL.

Roadblocks ahead
To accomplish that fete, AMD, IBM and others have decided to skip the 32nm node and are seeking to devise a 22nm "test chip" using EUV, Wood said. Later, it will develop a 15nm "test chip."

To devise a 22nm test chip, AMD and IBM will use the EUV tool and SEH's SEVR40 100mm photoresist. EUV will process the "contact levels," Wood said.

The device also consists of high-k and metal gates, which will be processed using 193nm immersion with double patterning. All told, the firms produced a 0.08um2 SRAM "flycell."

There are still some hurdles for EUV, including the source, mask and resist. Cymer and others claim to have demonstrated EUV sources from 20- to 40W, but 200W in power are required, he said.

Mask defects are currently 1/cm?, but 0.003/cm? is needed, he said. 28nm resists are required, but "we're almost there" in term of production-worthy photoresists, Wood added.

- Mark LaPedus
EE Times

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