Clock generator simplifies nets, comms

Analog Devices Inc.'s clock generator simplifies clock design and reduces the need for oscillators in multistandard networking and communications infrastructure systems. The AD9551 clock generator's architecture enables the device to generate and translate multiple precision network clock frequencies. As a result, as many as five oscillators can be replaced, the company said.

The AD9551 clock generator accepts one or two reference input signals and generates one or two output signals that are harmonically related by a programmable factor of 1 to 63. Precisely translating the reference frequency to the desired output frequency, it includes input receivers and output drivers that are capable of either single-ended or differential operation. On-chip reference monitoring and switchover circuitry internally synchronize the two references to prevent phase perturbations at the output in the event of a reference failure.

Should either or both references fail, the AD9551 maintains a steady output signal with no phase disturbance on the output. The device relies on an external 26MHz crystal (nominal) and the internal digitally-compensated crystal oscillator (DCXO) of the first of two cascaded fractional-N PLLs to provide a clean reference for the second PLL, and to hold the output frequency in case of reference failure. The second fractional-N PLL enables fine precision output frequency tuning with low phase noise.

The AD9551 provides a serial-peripheral interface (SPI) port, and pin-selectable pre-set divider values that offer an assortment of frequency ratios including all the standard rates for Gigabit Ethernet (644.53125MHz), 10GbE (625MHz), SONET/SDH (622.08MHz), and Fiber Channel (657.421875MHz) as well as the established FEC ratios (15/14, 239/237, 239/238, 255/237, 255/238).

Pricing starts at $14.75 for 1,000-piece quantities. The AD9551 are available for sampling, and production is expected on May 2009.

- Ismini Scouras
eeProductCenter