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ARM processor suits low-power apps

Posted: 27 Feb 2009 ?? ?Print Version ?Bookmark and Share

Keywords:ARM processor? MCU low power? core processor?

With help from lead partner and licensee NXP, ARM Holdings plc has designed a very low gate-count ARM processor core suitable for use in MCUs aimed at ultralow-power applications. Chips are expected to ship from licensees before the end of 2009.

The processor core, previously codenamed Swift and now called Cortex-M0, looks set to be one more (last?) nail in the coffin of the 8bit MCU as well as enabling ARM and its licensees to engage in applications mandated on energy efficiency, such as wireless sensor nodes and e-metering.

And with just 12,000 gates the Cortex-M0 core has been designed expressly for low power consumption and could find many applicationsalthough ARM is by no means the first company to offer a low gate-count processor core.

The Cortex-M0, which has not yet been implemented in dedicated silicon, is behind the established Cortex-M3 core both in terms of performance and complexity. But that reduced complexity has the benefit of producing a low-cost and potentially very low-power implementation of the ARM 32bit processor architecture.

The Cortex-M0 offers 32bit performance in the footprint of a 16bit processor, enabling 8bit MCU developers to "skip" 16bit devices and move directly to 32bit, ARM claimed, but with the advantage of remaining compatible with the established Cortex-M3 and with the Cortex-M1, which is ARM's synthesizable MCU core for use in FPGAs.

The low gate-count also allows the M0 to be implemented in what is essentially the digitization of analog or mixed-signal chips, the company said.

Other applications
"We will supply M0-based components before the end of 2009," said Geoff Lees, general manager of the microcontroller division at chip company NXP BV. NXP has only been in the market with Cortex-M3 MCUs since October 2008. Nonetheless, Lees clearly has applications in mind for the M0 in the industrial, consumer and medical sectors.

"Low power e-metering, consumer peripherals such as MP3 accessories, power management there's a new charging standard coming in based on micro-USB. Automotive will be a strong market, eventually. But right now automotive is on its knees," Lees said. "And then anything to do with energy harvesting and renewable energy," he said.

Richard York, director of product marketing for ARM's processor division, said: "For certain markets, the Cortex-M3 is too big in terms of performance and in terms of power consumption, for example where we are replacing state machines and dedicated logic."

The Cortex-M0 offers comparable performance to the synthesizable version of the ARM7TDMI and has been benchmarked at 0.9 dhrystone MIPS/MHz and 0.85?W/MHz in the 180ULL process from Taiwan Semiconductor Manufacturing Co. Ltd. According to an ARM documentation, the Cortex-M3 processor performs at up to 1.2DMIPS/MHz with a core of 33,000 gates.

Lees made it clear that NXP's strategy is based not only on the MCU core but also on the design style and manufacturing process technology. In fact, it is doing everything together to drive down dynamic and static power consumption.

There is a strong synergy with the ARM physical IP such as memory for the MCU. NXP has made use of the ARM SRAM compiler, Lees said. "SRAM can be up to 40 percent of the die, so it is vital to have that as low-power as possible. And the 180ULL process is just about the best process for low-leakage flash process."

Lees said he sees a bipolar distribution for Cortex-M0 with some implementations on mixed-signal processes at 0.18?m or higher nodes and others with a Cortex-M0 thrown on to a leading-edge system-chip at 65nm or 40nm to do a dedicated function such as touchscreen control in mobile phones.

Clean-sheet design
According to York, the secret of developing a compact processor core comes down to a clean-sheet design. "The instruction set is well-defined. It's a three-stage pipeline [like the M3]; some instructions take multiple cycles, some take one cycle," said York.

However, one way to strip out the complexity is drop the RISC principle of single-cycle execution and things such as speculative execution. The M0 is built of control and power efficiency, not for speed. "M3 has got much richer maths instruction execution," said York.

The M0 maintains the nested vector interrupt controller and the wake-up interrupt controller from the M3 design, which is one of the keys to allowing the Cortex-M0 to start up quickly, execute and then fall back to energy-conserving sleep mode. The result is the M0 occupies about one-third the area and consumes about half the dynamic power of the M3, according to York and Lees. ARM supplies serial debug features, but allows licensees to configure how much they need.

And both the M3 and the M0 make use of the ARM AMBA bus as the means to link peripherals to the core. As a rule, ARM does not license microcontroller peripherals to MCU companies, that being the way they add value. But ARM has taken the DMA controller out of the processor core and implemented a mini DMA memory controller as AMBA-bus peripheral.

The pioneer
However, Cambridge Consultants Ltd was pioneering the ultra-compact RISC processor some 15 years before ARM.

Alistair Morfey, a design engineer with Cambridge Consultants, started with a 16bit XAP processor in 1994 specifically to support embedded applications that Cambridge Consultants was developing for its clients in such sectors as industrial, low-cost consumer and medical sectors.

The XAP2 MCU used to be provided in the form of process-portable Verilog at the RTL. That processor synthesized to around 12,000 gatesabout the same as the M0and was designed-in to Bluetooth chips made by CSR plc. Other licensees include Chipcon, subsequently bought by Texas Instruments, Cyan Technology, Ember Corp. and GreenPeak Technologies.

Cambridge Consultants also pioneered a royalty-free model in the early days of licensing the XAP, which has subsequently been updated with 32bit versions. The XAP energy-efficient processors are now in over a billion chips so ARM already has competition in the field.

According to Lees, the MCU market is worth $15 billion per annum with $3 to $5 billion having been won over to 32bit solutions. "That means the 8/16bit MCU market is still worth $10 billion," said Lees, saying that was the market that M0 could take.

NXP's MCU history, although strongly based on the 8bit 8051, has more recently been based on the ARM926 and the Cortex-M3. Lees said: "We wouldn't license a core with a completely different instruction set. If you have a vision of supporting 10 companies, the infrastructure is much more important."

The Cortex-M0 is supported by third-party tool and RTOS vendors including CodeSourcery, Code Red, Express Logic, IAR Systems, Mentor Graphics, Micrium and Segger. The Cortex-M0 processor is compatible with the recently-launched Cortex Microcontroller Software Interface Standard (CMSIS), a hardware abstraction layer for the Cortex-M processor series.

The CMSIS enables consistent software interfaces to the processor for silicon vendors and middleware providers, simplifying software re-use, reducing the learning curve for new MCU developers and reducing the time-to-market for new devices.

Lees said it was an imperative of NXP's lead partner status that the M0 use the same C language compiler as the M1 core. "There is the addition of a 'deep sleep' instruction, but that is a major benefit and is worth the exception."

The new processor extends the company's MCU roadmap into ultralow-power MCU and SoC applications such as medical devices, e-metering, lighting, smart control, gaming accessories, compact power supply, power and motor control, precision analog and IEEE 802.15.4 (Zigbee) and Z-Wave systems. The Cortex-M0 processor is also suitable for the programmable mixed-signal market with applications such as intelligent sensors and actuators, which have traditionally required separate analog and digital devices.

"By providing 32bit performance in a 16bit footprint, the ARM Cortex-M0 processor enables us to reduce silicon and energy costs without compromising product enhancements or upward code compatibility, making it an ideal complement to the Cortex-M3 architecture that we use across our products," said Lees.

Triad Semiconductor Inc. is also an early licensee of the Cortex-M0. Triad designs and manufactures mixed-signal ASICs, and in particular, offers structured ASICs through the use of Via Configurable Array technology with single-mask layer configuration.

"Smart sensors are an ever growing requirement in a wide range of next-generation applications from industrialcto medical and automotive," said Jim Kemerling, chief technology officer of Triad Semiconductor, in a statement. "Combining the ARM Cortex-M0 processor with our silicon-proven configurable analog and digital technology will provide Triad Semiconductor customers with the fastest, safest and most cost-effective way to design, prototype and produce advanced mixed signal ASICs."

This arrangement that Triad is calling Mocha and through the single-mask layer the same piece of silicon can be configured as dual-channel sensor interface, a BLDC motor controller, an RGB LED driver plus capacitive touch or a hysteretic controller.

"Mocha-1 will be available for customers by the end of the year; prototypes in Q3 and production in Q1 of 2009," said Reid Wender, VP of marketing. Wender said Triad was working with Austriamikrosystem to produce the Mocha-1 in a 0.35?m process technology.

Two other notable ARM licensees not included in the recent M0 announcement are Luminary Micro Inc. and Energy Micro A/S. Luminary was ARM's lead partner for the introduction of MCUs based on the Cortex-M3. Energy Micro AS is working on an ARM Cortex-M3 based MCU family due to start shipping in August 2009. It is pledged to produce the most "energy-friendly" MCUs.

York declined to comment on whether Luminary and Energy Micro were active licensees of the Cortex-M0. The ARM Cortex-M0 is available for licensing immediately.

- Peter Clarke
EE Times Europe

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