Using a Micron CellularRAM device with the AMCC PPC405EZ embedded processor

The Applied Micro Circuits Corp. (AMCC) PowerPC 405EZ embedded 32bit RISC processor provides an external memory bus that is specifically designed to interface with a x16 CellularRAM device. This technical note describes the design requirements for a seamless memory connection between the PPC405EZ and a Micron CellularRAM device.

Micron CellularRAM devices are high-speed, pseudo-SRAM memory devices developed for low-power, portable applications. These devices, which use a DRAM-based memory core, are designed to be backward compatible with the more costly 6-transistor SRAM. For seamless operation on an SRAM bus, CellularRAM devices incorporate a transparent self refresh mechanism. This hidden refresh requires no additional support from the system memory controller and has no significant impact on READ/WRITE performance.

This technical note focuses on the asynchronous/page/burst, 128Mbit, CellularRAM 1.5-compliant device, MT45W8MW16B.

View the PDF document for more information.

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Related Info

What is a processor?
Refers to a system that accepts a program as input, prepares it for execution and executes the process defined with data to produce results. Can be a short term for a microprocessor or central processing unit (CPU) in computers.

What is DRAM?
Dynamic random access memory (DRAM) is a type of random access memory that stores each bit of data in a separate capacitor within an IC. Since real capacitors leak charge, the information eventually fades unless the capacitor charge is refreshed periodically. Because of this refresh requirement, it is a dynamic memory as opposed to SRAM and other static memory. And unlike non-volatile firmware chips, both DRAM and SRAM lose their content when the power is turned off.

Using a Micron CellularRAM device with the AMCC PPC405EZ embedded processor

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