Process variability gets a second chance
Keywords:process variability? DFM? design-for manufacturing?
"If you understand [process variability] and can take it into account in your design, not only is it not bad but it might work to your advantage," said Jean-Marie Brunet, a director of product marketing at Mentor. "If you are blind to what is the weakness point of your design, then you are in trouble."
"You can use process variability, and you can get advantages out of it, especially in a fabless model, where a foundry has to write one set of rules for all of its customers," said Michael Buehler-Garcia, director of Calibre design marketing for Mentor's Design to Silicon division.
Mentor earlier last week announced new capabilities that it says extend the Calibre platform to controlling thickness variability from chemical mechanical planarization (CMP) at advanced nodes. The Calibre solution enables customers to transition from dummy fill¡ªa method of improving deposition thickness uniformity¡ªto density-based or full model-based fill, depending on the demands of a design.
Buehler-Garcia said DFM, which was all the rage a few years ago, has been knocked as being marketing hype. But customers have gone from thinking of DFM as a luxury to a requirement at advanced process nodes, he said, partly because they are seeing specific problems that aren't fixable by fabs and not addressed by design flows, and partly because foundries are beginning to require it.
At the 45nm node, Chartered Semiconductor Manufacturing and other members of the Common Platform Alliance added a DFM score to their third-party IP acceptance criteria, meaning that IP must exceed a DFM score to be accepted, Buehler-Garcia said. He expects that other major foundries will follow suit.
Competitive weapon
Companies are also increasingly viewing DFM as a competitive weapon, according to the Mentor executives, who said firms are warming up to the fact that more robust designs perform better on silicon and that a faster and more predictable yield ramp means they can sample product faster. Chip vendors are also realizing that eliminating manufacturing surprises means fewer costly re-spins, they said.
Earlier this month, Mentor announced that Cambridge Silicon Radio Limited (CSR) used the Calibre DFM platform to achieve working 65nm silicon. CSR executives praised the DFM technology as integral to the achievement.
According to Buehler-Garcia, this was a watershed moment: perhaps the first acknowledgement that DFM is truly a difference maker. "Finally we saw an announcement that DFM actually matters to a fabless company," Buehler-Garcia said. He added that CSR was not the first to experience success with Calibre DFM, just the first to give Mentor permission to trumpet it.
Mark Redford, CSR's VP of advanced process technology development, said the company worked with Mentor to define a collaborative roadmap for the introduction of a DFM methodology and support tooling.
"This is a strategic initiative for us because we see DFM as a competitive advantage," Redford said. "It's a way for us to get more advanced, higher performance products to market more quickly and with no manufacturing hitches late in the product development cycle."
Brunet said the allowable CMP thickness variation has remained constant at ¡À10nm since the inception of CMP. However, the allowable thickness variation as a percentage of total deposition thickness has increased at each node and will hit 20 percent at the 32nm node, he said.
Dummy fill techniques¡ªwhich essentially insert triangle-shaped fill into all gaps¡ªhave served the industry well to this point, Brunet said. But in order to ensure predictability of manufacturing, filling solutions must migrate from simple static commands to smart, design-aware solutions, he said.
Related Articles | Editor's Choice |
Visit Asia Webinars to learn about the latest in technology and get practical design tips.