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New JEDEC standard doubles memory interface performance

Posted: 17 Apr 2009 ?? ?Print Version ?Bookmark and Share

Keywords:memory interface? management partition? memory standard?

JEDEC Solid State Technology Association announced the publication of JESD84-A44 MMC ver. 4.4 standard. The new standard offers designers a doubling of the memory interface performance, flexible partition management and improved security options. MMC ver. 4.4 is available for free download at www.jedec.org.

Suitable for a wide range of applications in consumer electronics, navigational systems and other industrial uses since its publication in 2006, eMMC is an embedded non-volatile memory system, comprising both flash memory and a flash memory controller. It simplifies the application interface design and frees the host processor from low-level flash memory management. This benefits product developers by simplifying the non-volatile memory interface design and qualification process, resulting in a reduction in time-to-market and facilitating support for future flash device offerings.

Small BGA package sizes and low power consumption make eMMC a viable solution for mobile and other space-constrained products. The new MMC ver. 4.4 standard features a doubling of the memory interface performance over the previous standard. The maximum data transfer speed will increase from 52MBps to 104MBps with the adoption of a dual data rate interface, while still maintaining full backward-compatibility to legacy (single data rate) products. Also included in the new standard is the introduction of a flexible partition management system, in addition to allowing partitions to be set and operated in an enhanced performance mode.

Several key security enhancements are provided in the new standard including increased write protection management, introduction of a secure access-controlled memory block and secure erase and trim for secure data erase operations. Various usage models can now be supported with both permanent and temporary write protection methods, allowing write protection to be selectively applied to user data and boot areas. The introduction of a Replay Protected Memory Block allows for a portion of memory to be accessed with a hidden security key, providing secure storage for the host to protect crucial programs or data, as well as enable copy protection. The new Secure Erase & Secure Trim operation provides a means of ensuring that stored data is physically erased from memory, thereby preventing subsequent retrieval of the information.

Backward-compatible to earlier eMMC versions, the MMC ver. 4.4 standard offers a multitude of benefits to product developers, while continuing to provide a simplified non-volatile memory interface in a comprehensive non-volatile memory solution.

"Micron is pleased to support the new MMC ver. 4.4 standard, and offer host manufacturers new storage solutions for today's mobile devices through the continued evolution of eMMC," said Graham Robinson, director of mobile products group for Micron Technology Inc.

"eMMC is a fast, secure, reliable embedded mass-storage flash solution, which offers incredible ease-of-use to host manufacturers and application developers," said J. H. Lee, Director, Memory Technical Marketing, Samsung Semiconductor, Inc. "The new enhancements outlined in MMC ver. 4.4 will enable the development of innovative new products in consumer electronics, as well as greater innovation in smart phones, portable GPS units and other mobile devices."





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