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Secure MCU packs NV SRAM, tamper-detection tech

Posted: 20 Apr 2009 ?? ?Print Version ?Bookmark and Share

Keywords:secure MCU? microcontroller? SRAM? memory non volatile? tamper detection?

MAXQ1850 microcontroller

Maxim Integrated Products has introduced the MAXQ1850 high-performance 32bit RISC microcontroller for the financial terminal market.

The MAXQ1850 integrates security supervisory features, advanced encryption acceleration, and 8Kbyte of non-volatile memory (NV SRAM) around a 32bit MAXQ MCU core. The device also has the lowest pin count and smallest footprint available for applications that require a high level of physical and logical security. It provides an excellent cost point for use as a coprocessor in complex point-of-sale (POS) terminals or as the main microcontroller in encrypting PIN pad applications. The MAXQ1850 is also suitable for government applications and digital rights management.

The MAXQ1850's security mechanisms protect against both logical and physical attacks: encryption engines are resistant to side-channel attacks and cryptanalysis; environmental sensors protect against physical manipulation; and secure tamper triggers offer many options for application-specific tamper-detection circuits. Most important for secret key protection is the MAXQ1850's custom-designed, battery-backed NV SRAMthe best kind of memory for secret storage because it can be erased quickly in reaction to tampering.

The MCU's combination of NV SRAM for secret storage, tamper-detection technology, and hardware encryption accelerators make it a suitable choice for financial terminal applications and any other application requiring security certifications such as PCI, FIPS 140-2 or Common Criteria.

Security guaranteed
The MAXQ1850 is optimized for use as a system microcontroller in simpler financial terminals, or as a secure coprocessor in complex POS terminals. It is the only high-security MCU that does not feature an external memory bus, so it has an extremely low pin count. Maxim offers the device in compact 6mm x 6mm, 40-pin TQFN and 7mm x 7mm, 49-ball CSBGA packages. Competitive devices often have over 200 pins and footprints as large as 17mm x 17mm. The MAXQ1850 thus drastically reduces the amount of board space required for the system microcontroller for applications that need 256Kbyte of flash and 8Kbyte of secure NV SRAM.

The MAXQ1850 also provides greater flexibility when used as a secure coprocessor in higher-end financial terminals. By executing all necessary security functions and key management, the MCU maintains the security of the financial terminal without having to send the keys from one IC to another. Additionally, it allows designers to build the security architecture around the MAXQ1850, while the main processor uses the latest high-end microcontroller on an aggressive technology node that does not support the same security level as the MAXQ1850.

Finally, the device's small package enhances security. Small components allow for smaller security modules inside smaller terminals, making it more difficult for attackers to open and manipulate the terminal.

In addition, MAXQ1850 offered improved power consumption by integrating all of its functions into one chip: NV SRAM for key storage, a real-time clock, and circuitry to detect tamper events. These circuits are designed to be lean in battery-backed modea low-power ring oscillator clocks the circuitry that monitors security, and the SRAM is custom designed to require minimal current to maintain its state. The resulting MAXQ1850 device provides complete security functions with a worst-case +85C battery leakage of 2.5?A. Using the original example of a 250mAh battery, this translates to 11.4 years of life. Considering its typical battery leakage of 460nA, the MAXQ1850 will yield well over 20 years of life with a smaller, less expensive 125mAh battery.

Supporting advanced encryption
The MAXQ1850 is the first physically secure microcontroller on the market to provide fast, efficient hardware support for the Advanced Encryption Standard (AES) as described in FIPS 197.

Delivering the most advanced encryption, the MAXQ1850 integrates a high-performance AES encryption accelerator. The hardware AES accelerator needs less than 200 cycles to execute an encryption or decryption operation in all configurations. In addition, the AES engine is tied to the MAXQ1850's internal high-speed, secure oscillator, which operates at 65MHz. This means that an AES encryption or decryption, with any key length, will complete in less than 3.1?s. Also, since the algorithm is implemented in hardware and not software, The MAXQ1850 also has hardware acceleration support for several other advanced encryption algorithms, including the Secure Hash Algorithm (SHA-1, SHA-224, SHA-256), DES, 3DES, RSA (up to 2048bit keys), DSA, and Elliptic Curve DSA (ECDSA).

The MAXQ1850 is available in 6mm x 6mm, 40-pin TQFN and a 7mm x 7mm, 49-ball CSBGA packages. It operates over the 0C to +70C commercial temperature range. A version that operates over the -40C to +85C industrial temperature range will follow in a few months. Evaluation kits and software libraries are available to help move quickly from concept to prototype to finished product. Prices start at $6 (1,000-up, FOB USA).





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