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Optoelectronics/Displays??

ST, Soitec co-develop BSI tech for CMOS image sensors

Posted: 19 May 2009 ?? ?Print Version ?Bookmark and Share

Keywords:CMOS image sensor? 300mm wafer? backside illumination tech?

STMicroelectronics and Soitec Group have entered an exclusive joint cooperation to develop of 300mm wafer-level backside-illumination (BSI) technology for next-generation image sensors in consumer products.

The resolution of leading-edge image sensors is continuously increasing, while demand is high for the overall reduction of the camera-module footprint, particularly in consumer markets. This means the necessary development of smaller individual pixel sizes, while maintaining pixel sensitivity to produce high-quality images. BSI is a key enabling technology to meet this challenge in the development of next-generation image sensors.

The agreement between the two companies includes the licensing by Soitec to ST of the Smart Stacking bonding technology for the manufacturing of BSI sensors on 300mm wafers. The technology, developed by Soitec's Tracit business unit, leverages molecular bonding, mechanical and chemical thinning. ST will develop a new generation of image sensors based on its advanced derivative-CMOS process technology at 65nm and beyond, at its 300mm facility in Crolles, France. In combination with ST's advanced wafer-level manufacturing capabilities, the Smart Stacking technology will enable ST to increase its leadership in developing and supplying high-performance image sensors for mobile consumer products.

"Backside illumination technology is a key ingredient in the small-pixel, high-image-quality race for the development of leading-edge image sensors," said Eric Aussedat, group VP and general manager, imaging division, ST. "Partnering with Soitec will help quickly deploy the Smart Stacking technology into ST's camera products. This agreement will accelerate the development of advanced and superior cost-competitive image-sensor processes, and further confirms the Grenoble region as a world-class center of expertise for advanced CMOS imaging technologies."

"We are very pleased that ST has chosen our Smart Stacking technology for their BSI product," said Andre-Jacques Auberton-Herve, chairman and president of the Soitec. "This technology developed by our Tracit business unit, supports fast implementation of advanced processes involving substrate engineering and 3D integration. We are glad to support ST's commitment to innovation for the benefit of their customers."





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