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Consortium pushes for next-gen memory interface spec

Posted: 20 May 2009 ?? ?Print Version ?Bookmark and Share

Keywords:memory interface? DRAM? Serial Port Memory Technology?

Hynix Semiconductor Inc., LG Electronics, Samsung Electronics Co. Ltd and Silicon Image Inc. have formed an industry consortium that promotes Serial Port Memory Technology (SPMT) for broad market adoption as an industry standard. As the first-of-its-kind memory specification for DRAM, SPMT will initially target the mobile handset market, enabling a new generation of devices capable of running highly data intensive, media-rich applications while at the same time extending battery life.

"I am extremely pleased to have such a stellar group of companies come together to form the SPMT Consortium to develop and promote a new memory interface architecture specification for the growing demands of media-rich mobile devices," said Jim Venable, chief technology evangelist of SPMT, LLC. "Serial Port Memory Technology will represent a big step forward by offering mobile handset designers the ability to expand their horizon for a new generation of products."

As future generations of handsets take on more functions typically seen in laptops, and as the line between cellphones and handheld media-intensive devices blur, new memory architectures will be required to handle demands for ever greater bandwidth while keeping power low and cost down.

"Successful solutions for mobile products need to deliver increased functionality and features while still providing extended battery life," said JB Kim, senior VP of memory products at Hynix. "SPMT is uniquely positioned to deliver on the requirements of leading-edge mobile devices and we are proud to be part of the team that will define the next-generation memory interface for this growing market."

The SPMT Consortium was founded to provide the technology capable of delivering the bandwidth flexibility and scalability required by new generations of mobile devices, all at significantly reduced pin count, low power consumption, and at a lower cost.

The SPMT Consortium's founding members (promoters) form the governing body of the organization and are, together with contributor members, responsible for developing the SPMT specification which features:

??Pin count reduction by a minimum of 40 percent compared to existing DRAM technologies;
??Flexible bandwidth ranging from 200MBps to 12.6GBps and higher;
??Single or multiple port configurations connecting to a single SPMT-enabled memory chip.

"As mobile handset devices evolve we are going to see a growing demand for media-rich applications supported by highly advanced memory devices," said Myung Ryu of the development procurement team at LG Electronics. "Participating as a promoter in the SPMT Consortium helps us to ensure that the right technology is available to the industry at the right time for future product offerings."

"At Samsung, we are dedicated to developing cutting-edge technologies and advanced processes to create new products that are of slim and simple design," said Seijin Kim, VP of memory products at Samsung. "We are pleased to work with the SPMT Consortium."

"We are looking forward to contributing our high-speed serial technology and expertise to the SPMT specification," said Eric Almgren, VP of business development and intellectual property licensing at Silicon Image. "As new applications like high-definition 1080p video become a reality in the mobile handset market, advanced memory technology will be required to make such features a reality and SPMT is well positioned to lead that market segment."

The SPMT promoters also announced the formation of the SPMT, LLC, the entity chartered with managing the day-to-day activities of administering the SPMT specification.

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