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SPI multi I/O flash achieves up to 40MBps

Posted: 27 May 2009 ?? ?Print Version ?Bookmark and Share

Keywords:SPI flash? multi I/O? NOR flash?

NOR flash provider Spansion Inc. has released a new family of SPI devices based on 90nm NOR technology.

The MirrorBit SPI multi-I/O flash memory devices range in densities from 32- up to 128Mbit. SPI devices read information serially, or one bit at a time, requiring fewer connections and pins. This lowers the cost and simplifies board layout.

Each device from Spansion supports the option for single (one-bit data bus), dual (two-bit data bus) or quad (four-bit data bus) serial I/O data transmission. With multiple I/O, devices can transmit and receive data either one, two or four bits at a time, enabling faster speeds while still requiring only eight total pins or four active pins to retain the original benefits of single I/O SPI, according to Spansion.

Performances of up to 40MBps (80MHz per I/O in quad I/O mode) makes the MirrorBit SPI multi-I/O family capable of executing code in-place (XIP) for a variety of industrial and consumer electronics applications. The performance matches or exceeds conventional parallel I/O NOR flash memory, the company claimed.

Spansion's devices are aimed for optical disk drives, PCs and high-end printers, as well as networking and home entertainment equipment such as digital TV, DVD players/recorders and STBs.

The 32Mbit S25FL032P MirrorBit SPI multi-I/O device is available in 8-pin SOIC (208 mil), 16-pin SOIC, USON (6mm x 5mm) or WSON (6mm x 8mm) packages. The 64Mbit S25FL064P and 128Mbit S25FL129P MirrorBit SPI multi-I/O devices are available in 16-pin SOIC or 8-contact WSON (6mm x 8mm) packages.

The 32Mbit device is in full production now. The company expects to sample and be in production of the 64Mbit device in June, and the 128Mbit device in Q4 09.

- Mark LaPedus
EE Times





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