Wave solder exposure of SMT packages

Attaching surface mount components to the bottom side of a PCB by wave solder processing is common practice. Because surface mount components are normally soldered using a reflow oven process, the impact of wave soldering and wave solder simulation methods must be understood.

Process characterization was performed to compare the wave solder reflow method, the solder dip method and standard reflow oven processing. Units processed through the solder dip method see a very quick rise time to peak temperature, which is quite different from the other two methods. The solder dip method has excessive thermal shock.

A designed experiment compared the contribution of moisture soak, wave time and PCB design. Both moisture soak and wave time have a strong effect on the variation seen in delamination. Reliability stressing demonstrated passing results for the units.

Testing demonstrated that the solder dip method is not a good simulation method for wave solder exposure of surface mount components. DOE testing demonstrated that moisture soak and wave time are significant factors in the process. Reliability stressing showed that units passed even with variations seen in package delamination.

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