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Hamming codes for NAND flash memory devices

Posted: 09 Jun 2009 ?? ?Print Version ?Bookmark and Share

Keywords:NAND flash? Hamming? data corruption SLC?

NAND flash memory products have become the technology of choice to satisfy high-density, non-volatile memory requirements in many applications. NAND flash technology provides large amounts of storage at a price point lower than any of today's semiconductor alternatives. NAND flash development has focused on low cost per bit, resulting in a technology that requires significantly more system involvement than other flash technologies. In particular, NAND flash memory can be expected to experience minor data corruption at some point during normal operation.

NAND flash devices use one of two different memory cell technologies. The first cell design is the traditional implementation, where each memory cell represents a single bit of data. The single-bit-per-cell approach is categorized as single-level cell (SLC). The second approach is to program each cell in incremental amounts. With this approach, the data value is determined by how "hard" a cell has been programmed. This multilevel cell (MLC) approach allows each cell to represent 2bits of data. Historically, SLC NAND flash devices have provided improved data integrity when compared with their MLC counterparts. The data integrity in MLC requires a significantly more sophisticated error correction scheme than is used for SLC NAND flash devices.

This application note describes the use of simple Hamming codes to detect and correct data corruption that occurs during normal SLC NAND flash device operation. The Hamming algorithm is capable of repairing single-bit data failures and detecting whether 2bits have become corrupted. The Hamming algorithm is an industry-accepted method for error detection and correction in many SLC NAND flash-based applications.

View the PDF document for more information.

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