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Fab tool collaboration: Mission impossible?

Posted: 22 Jul 2009 ?? ?Print Version ?Bookmark and Share

Keywords:fab tool? Moore's Law? lithography? foundry?

During a SEMI press event at the Semicon West show, executives from two rival fab tool vendors!Applied Materials Inc. and Tokyo Electron Ltd. (TEL)!were seated at opposite ends of the head table.

Perhaps that was a mere coincidence. Perhaps not. Clearly, Applied and TEL are bitter rivals and it appeared the two executives were kept apart for symbolic reasons.

But perhaps in the future, rival fab tool vendors may have to sit closer at luncheons!and one day do the unthinkable: They may have to throw out the rule book and collaborate with each other on new equipment R&D projects!just to help the industry keep pace on Moore's Law.

At the trade show, there was an urgent cry for more R&D collaboration!and new R&D business models!in the IC industry, especially among equipment makers. R&D funds are limited and vendors may need to collaborate more to reduce the costs and risks.

This could be especially true on some (but not all) technologies, such as 450mm fabs and extreme ultraviolet (EUV) lithography. Other next-generation lithography schemes, metrology and through-silicon-vias (TSV) are other examples of technologies that will require massive R&D dollars going forward.

Simply put, if fab tool vendors continue to pretend it's business as usual!and continue to work in silos!the two-year process cycle is in danger of slowing, observers warned. And many fab tool suppliers, which refuse to cooperate with each other, could also end up on the endangered list and become victims of the shakeout. With or without cooperation, others think the loss-ridden fab tool industry is in deep trouble amid the horrific downturn, causing concern among leading-edge chip makers.

Moore's Law, which has held as the benchmark for IC scaling for more than 40 years, will cease to drive semiconductor manufacturing after 2014, when the high cost of chip manufacturing equipment will make it economically unfeasible to do volume production of devices with feature sizes smaller than 18nm, warned iSuppli Corp. in a recent report.

"The current size of the wafer fabrication equipment industry does not support the significant levels of R&D spending needed to follow Moore's Law and deliver leading-edge systems and processes to customers," warned Tom St. Dennis, senior VP and general manager of Applied's Silicon Systems Group.

"This is becoming an increasingly evident as logic, DRAM and flash technologies continue to diverge," said St. Dennis. "To support our customers in advancing their technology roadmaps and provide critical customer services, we see the need for new business models and alliances to optimize the utilization of our industry's resources."

(At the SEMI press event mentioned above, St. Dennis was sitting at one end of the head table. On the opposite end was Harvey Frye, president of rival Tokyo Electron America Inc., the U.S. arm of Japan's TEL.)


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