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Physical IP libraries deliver energy-efficient MCUs

Posted: 04 Aug 2009 ?? ?Print Version ?Bookmark and Share

Keywords:microcontroller? IP library? embedded? processor?

ARM is offering ultralow-power Physical IP libraries designed to drive the next generation of energy-efficient microcontroller devices.

The ARM 0.18?m ultra low power libraries (uLL), coupled with the inherent power management advantages of the ARM Cortex processor family and the TSMC 0.18?m embedded flash uLL/HDR 'high data retention' process provides SoC designers with additional reduction in power leakage up to 10x compared to 0.18? m G implementations.

The ARM libraries, combined with the ARM Cortex-M and Cortex-R profile processors, provide an alternative to companies that are accustomed to a multiple MCU system approach. Utilizing an advanced ultralow-power, single 32bit MCU and optimized ARM libraries for the TSMC 0.18?m uLL embedded flash/HDR process, designers can increase their design efficiency and lower overall system cost. The combination of physical IP, processor architecture and leading-edge manufacturing technology enables the development of enhanced 32bit MCUs for automotive, consumer appliance, sensor, lighting, e-metering, smart control and gaming devices.

"Consumer demand for mobile and embedded devices offering higher performance, enriched user experience and extended battery life continues to increase," said Tom Lantzsch, VP, physical IP division at ARM. "By utilizing our 0.18 um uLL libraries and Cortex family of processors, companies can now maximize their design and energy efficiencies through a single 32bit MCU, fully tuned with foundry-specific libraries. This powerful combination of IP accelerates the development of next generation energy-efficient embedded devices."

ARM low-power memory instances and Ultra High Density Standard Cell libraries, tuned for Cortex-M profile-based processors coupled with the ARM Power Management Kit(PMK) provides additional power saving benefits.

The PMK libraries minimize power consumption in several ways. They support dynamic operation of functional blocks at multiple voltages. The power gates and isolation cells enable a sleep mode and ensure fast wake-ups. The libraries are equipped with data-retention flip-flops and always-on cells. Biasing cells provide connections for well back-biasing and reduce leakage even further. All the PMK libraries are designed to achieve optimal power tradeoffs.

The ARM DesignStart access program offers the most comprehensive online IP library in the industry. The DesignStart program contains more than 10,000 standard cells, memories and interconnects libraries accessible online. Several of the libraries are sponsored by the foundries and are accessible free of charge. In addition, there are industry-proven processor design kits for some of the most popular ARM processor families.

- Paul Buckley
Power Management DesignLine Europe

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