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Is TSMC delaying high-k again?

Posted: 10 Aug 2009 ?? ?Print Version ?Bookmark and Share

Keywords:foundry? high-k/metal-gate? TSMC high-k delay?

As reported, foundry giant Taiwan Semiconductor Manufacturing Co. Ltd is struggling to ramp up its 40nm process due to yield issues.

Now, TSMC appears to have delayed its high-k/metal-gate technologyby at least three quarters or more. Originally, TSMC's high-k/metal-gate offering was slated for Q1 10, according to the firm. That technology is slated for its 28nm node.

In a conference call last week, TSMC chairman Morris Chang said that the company would "tape-out" 28nm with high-k/metal-gate in late 2010 or early 2011. Chang said that TSMC is engaged with 10 customers with its high-k.

For some time, there has been chatter that TSMC will ship its 28nm processwithout high-kin the first part of 2010. So in that regard, TSMC's 28nm offering is not late. However, TSMC's high-k is late to the party. In comparison, IBM's fab club hopes to ship high-k by the end of 2009.

TSMC is a good company, but this appears to confirm my suspicions that TSMC is struggling with high-k. "TSMC has also not really mastered the art of 'high-k/metal gate fabrication,' " said C.J. Muse, an analyst with Barclays Capital, in a recent report.

"After delaying its implementation to 28nm, TSMC is hedging its bets with a traditional oxynitride gate also available at 28nm. If, as suggested in trade publications such as those mentioned herein, the yield problem at 40nm is due to leakage, then, at 28nm, an oxynitride gate will expend even more power than a 40nm chip, due to high severity leakage problems," he said.

"For gate engineering, Intel (mainly) and AMD, for years, had used KLA-Tencor's Quantox and had not taken the development of high-k/metal gate architecture lightly. Now is the time that foundries are waking up to the seriousness of the engineering challenges below 40nm," he added.

KLA-Tencor's Quantox XP offers a gate monitoring solution for today's advanced gate dielectric processes. Its "ACTIV technology enables independent non-contact electrical test measurements of gate capacitance and leakage for in-line electrical process control," according to KLA-Tencor.

My theory: TSMC was working on its own high-k. It didn't work. Then, it had to resort to "Plan B." In April, ASMI announced that an undisclosed Taiwanese foundry has selected ASMI's Pulsar atomic layer deposition tool for the volume manufacturing of its 28nm node high-k gate dielectric process.

Some speculated that the customer could be TSMC. In any case, ASMI's Pulsar was the first tool to be used in volume manufacturing of high-k gates, starting at the 45nm node. ASMI's main high-k tool customer is Intel Corp.

Another wild theory: Intel recently licensed its Atom IP to TSMC. Intel and TSMC denied the deal involved high-k. Now, I'm really beginning to wonder if high-k is part of that deal.

- Mark LaPedus
EE Times

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