Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
?
EE Times-Asia > FPGAs/PLDs
?
?
FPGAs/PLDs??

Mid-range FPGA packs higher DSP capacity

Posted: 27 Aug 2009 ?? ?Print Version ?Bookmark and Share

Keywords:FPGA? DSP? RF solution? Ethernet?

Lattice Semiconductor Corp. has begun sampling of LatticeECP3(TM)-150 FPGA, the highest-density device in its high-value, low-power ECP3 mid-range FPGA family.

The ECP3-150 FPGA features a higher DSP capacity of 320 18x18 multipliers, 6.8Mbits of memory and up to sixteen 3.2Gbit/s Serdes channels, making it suitable for highly complex and integrated wireless remote radio heads such as MIMO-based RF antenna solutions. The ECP3-150 FPGA also provides wireline access developers with high-density, low-cost, low-power Ethernet, SONET and PCIe solutions, with low cost points and power footprints.

"Our mid-range LatticeECP3 FPGA family offers our customers an unprecedented combination of low power, high value and the features and performance necessary for sophisticated wireless and wireline design applications. With samples of our ECP3-150 device now widely available, our customers can implement even more complex designs for wireless and wireline access and still benefit from the device's low power and economy," said Shakeel Peera, Lattice marketing director for SRAM FPGAs.

Lattice also provides intellectual property (IP) cores, development boards and software to enable customers to develop time-to-market solutions. A range of IP cores including CPRI, OBSAI, Serial RapidIO, XAUI, SGMII/Gigabit Ethernet, PCIe, SMPTE for serial connectivity, FIR filters, FFT, Reed-Solomon encoders/decoders, CORDIC, CIC, NCO for DSP functions and several others for memory interfaces and connectivity are available. "The ECP3 family provides the best solution for the low cost serial interfaces used in 3G wireless base stations," Peera said.

The LatticeECP3 FPGA family is comprised of five devices that offer standards-compliant multi-protocol 3G Serdes, DDR1/2/3 memory interfaces for low-cost FPGAs and high performance, cascadable DSP slices that are suitable for high performance RF, baseband and image signal processing. Toggling at 1Gbit/s, the LatticeECP3 FPGAs also feature the fastest LVDS I/O available in a mid-range FPGA family, as well as embedded memory of up to 6.8Mbits. Logic density varies from 17K LUTs to 149K LUTs with up to 586 user I/O.

LatticeECP3-150 engineering samples are available in two low-cost wirebond packages (672 fpBGA and 1156 fpBGA). Prices for the LatticeECP3-150 in the 672 fpBGA package in 25K unit volumes start at $75. The LatticeECP3-70 and LatticeECP3-95, which were production released in February, are priced at $35 and $50, respectively, in 25K unit volumes.





Article Comments - Mid-range FPGA packs higher DSP capa...
Comments:??
*? You can enter [0] more charecters.
*Verify code:
?
?
Webinars

Seminars

Visit Asia Webinars to learn about the latest in technology and get practical design tips.

?
?
Back to Top