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40nm Stratix FPGA amps up 820K LEs

Posted: 16 Sep 2009 ?? ?Print Version ?Bookmark and Share

Keywords:FPGA? logic elements? ASIC?


Altera Corp. has beefed up the high-end density range of its 40nm Stratix IV E FPGAs to 820K logic elements (LEs).

The Stratix IV EP4SE820 FPGA is claimed to be the highest density, highest performance and lowest power FPGA in its class. The EP4SE820 FPGA is well-suited for a variety of high-end digital applications that require resource-rich FPGAs, including ASIC prototyping and emulation, wireline, wireless, military, and computer and storage applications.

The Stratix IV E FPGAs feature four devices ranging in density from 230K to 820K LEs. The new EP4SE820 delivers 53 percent higher density than Altera's EP4SE530 device and is at least one speed grade faster than the closest competitor's largest offering, according to the company. The density, performance and power-saving features in the EP4SE820 FPGA enable customers to simplify their design partitioning, accelerate their verification cycle, and reduce their total system power.

Increasing the number of LEs in Stratix IV E FPGAs to 820K gives ASIC-prototyping designers the ability to implement much larger ASIC designs on a single FPGA, which simplifies board design and minimizes the number of design partitions. For designers wanting to move their design into an ASIC after FPGA prototyping, Altera offers a low-risk, low-cost migration path to ASIC production with its HardCopy IV ASICs.

Additional features include 650K registers; 23.1Mbits of 600MHz embedded memory; 960 18x18 multipliers running up to 550MHz; 1,120 I/Os and 1.25Gbit/s LVDS performance.

Altera is currently shipping engineering samples of selected members of its Stratix IV E FPGAs.

- Ismini Scouras

For application notes on FPGAs click here.

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