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FPGA design software tailored for 40/100G apps

Posted: 24 Sep 2009 ?? ?Print Version ?Bookmark and Share

Keywords:FPGA? software? design support? telecommunications?

Xilinx announced design support for the Virtex-6 HXT FPGAs with the 11.3 release of the ISE Design Suite software. Optimized for 40G/100G wired telecommunications and data communications, Virtex-6 HXT FPGAs deliver serial interface technology to designers of ultrahigh bandwidth systems with line rates in excess of 11Gbit/s. The availability of ISE Design Suite 11.3 gives designers access to a portfolio of connectivity-domain FPGAs spanning the complete spectrum of mainstream, high-end, and ultra high-end serial design applications.

Aside from design support for Virtex-6 HXT FPGAs, the ISE 11.3 release expands protocol support for Spartan-6 and Virtex-6 LXT FPGAs and Virtex-6 SXT FPGAs. XGEMAC, XAUI and RXAUI, Tri-mode Ethernet MAC, Ethernet AVB, SPI4.2 and SPI-3 link are just some of the nearly forty protocols supported by Xilinx serial technology today. Designers now have their choice of connectivity-optimized devices with embedded low-power transceiver options for meeting their SoC power, reliability, and protocol requirements for a broad range of markets and applications:

?&nbps;For mainstream apps, Spartan-6 FPGAs with up to eight GTP 3.125Gbit/s transceivers satisfy the cost, ease-of-use, and low-power needs of high-volume electronics, such as automotive infotainment systems and high-resolution consumer displays.

?&nbps;For high-end applications, Virtex-6 LXT and SXT FPGAs with up to 36 GTX 6.5Gbit/s transceivers and performance margins that exceed the demands of high-speed protocols (e.g. Interlaken and PCIe 2.0) are ideal for multi-protocol systems, such as wireless base stations, switches and routers, and professional video equipment.

?&nbps;For ultrahigh-end applications, Virtex-6 HXT FPGAs with up to 72 serial I/O channels (48 GTX and 24 11Gbit/s GTH) transceivers save over 80 percent in transceiver power compared to solutions with external PHY for 40G/100G applications. These include transponders/muxponders, traffic managers, and packet processors for wired communications; high-performance data encryption engines; advanced medical imaging; and digital video production, editing, and broadcast equipment. Xilinx was the first FPGA vendor to offer a single-chip 100G solution for these applications with the introduction of Virtex-5 TXT FPGAs in 2008.

"Digital convergence in nearly all markets is driving the demand for higher bandwidth connectivity between chips, over backplanes, and across networks. At the same time, parallel I/O has reached its limit and serial solutions once relegated to only high-end designs are becoming ubiquitous," said Mustafa Veziroglu, VP of product solutions and management for Xilinx. "These trends create system complexity, performance, and cost issues that can't be addressed with a one-size-fits-all approach. Our market-driven focus enables designers to develop and deploy serial solutions faster with the right set of resources, performance, and capabilities for their applications."


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