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'First' 144Mbit SRAMs achieve 550MHz clock speed

Posted: 20 Oct 2009 ?? ?Print Version ?Bookmark and Share

Keywords:SRAM? 65nm process? networking? 3G?


Cypress Semiconductor Corp. has introduced what it claims to be the first monolithic SRAMs at 144Mbit densities, the latest members of its 65nm SRAM family. The 144Mbit QDRII, QDRII+, DDRII and DDRII+ memories leverage 65nm process technology developed with foundry partner United Microelectronics Corp. They feature the market's fastest available clock speed of 550MHz and a total data rate of 80Gbit/s in a 36bit I/O width QDRII+ device, and consume half the power of 90nm SRAMs.

They are suited for networking applications, including Internet core and edge routers, fixed and modular Ethernet switches, 3G base stations and secure routers, and medical imaging and military signal processing systems. The devices are pin compatible with 90nm SRAMs, enabling networking customers to increase performance and double address table or packet buffer size while maintaining the same board layout.

Compared with 90nm SRAMs, Cypress's 65nm QDR and DDR SRAMs offer up to 50 percent lower standby and dynamic current consumption, enabling the new wave of "green" networking infrastructure applications. The QDRII+ and DDRII+ devices have on-die termination, eliminating external termination resistors and thus improving signal integrity, reducing system cost and saving board space. The 65nm devices use a phase locked loop instead of a delay locked loop, which enables a 35 percent wider data valid window to simplify board-level timing closure and enhance compatibility with third-party processors.

Dave Kranzler, VP of sync and timing products at Cypress noted, "This introduction widens our lead by providing the fastest, largest devices in the industry. It's another clear indication of our commitment to the SRAM market."

The CY7C16xxKV18 65nm QDRII, QDRII+, DDRII and DDRII+ SRAMs are all currently sampling, with production expected in Q1 10. Each device is available in multiple configurations based on I/O width (x18 or x36), burst length (B4 or B2) and latency (1.5, 2.0 or 2.5). The 65nm 144Mbit SRAMs are available in industry-standard 165 FBGA packages and are pin-compatible with existing 90nm QDR and DDR devices for easy migration.

For application notes on SRAMs click here.

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