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Freescale, Synopsys extend verification tie-up

Posted: 30 Oct 2009 ?? ?Print Version ?Bookmark and Share

Keywords:Freescale Synopsys collaboration? verification? software?

Synopsys Inc. has expanded its verification collaboration with Freescale Semiconductor Inc. The integration of complex hardware enabled by Moore's law, IP, and embedded software content in modern devices is causing a rapid increase in verification complexity. The two companies are expanding an ongoing collaboration to manage this growing complexity. In addition to verification performance, efficiency, and methodology, they will also sort out how to manage the ever-increasing cost of verification, which can encompass up to 75 percent of the total cost of product development.

"Functional verification comprises the largest portion of our total cost of product development and has a greater impact on our production schedules than any other single factor," said Dan Cronin, VP of hardware R&D, networking solutions division at Freescale. "In addition to enabling us to deploy a state-of-the-art environment, our extended relationship is expected to address various verification metrics, including the efficiency of compute farms and productivity of engineers, allowing us to more efficiently manage the exploding total cost of verification."

"As one of the early adopters of SystemVerilog, Freescale played an important role in advancing the standard," said Manoj Gandhi, senior VP and general manager, verification group, Synopsys."Our collaboration is now extending beyond this standard. With verification becoming a larger part of overall product development cost, we are collaborating with Freescale to deliver solutions that help manage the total cost of verification."





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