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Industry focuses on core competencies, cutting costs

Posted: 12 Jan 2010 ?? ?Print Version ?Bookmark and Share

Keywords:EDA? core competencies? IC design? CMOS?

Lip-Bu Tan

Lip-Bu Tan: We must collaborate to reduce cost, remove bottlenecks and build a bright future for the electronics industry.

A long-awaited global recovery is underway and although slow, it will likely lift both the world economy and the semiconductor industry in 2010. However, that's only part of the story. The semiconductor industry is undergoing some significant changes that will, in turn, place new demands on EDA providers. Semiconductor companies are becoming more focused on their core competencies, and are increasingly collaborating on a global basis. They are prioritizing capital efficiency, and they are looking for help in containing the costs of both hardware and software development.

It's no secret that 2009 has been a difficult year. In December 2008, a survey of 10 analysts showed an average prediction of a 6.2 percent decline in worldwide semiconductor industry revenues in 2009. By June 2009, that average prediction had slipped to a negative 20.5 percent. Analysts generally expect strong growth in the semiconductor industry in 2010 and 2011.

The cost of IC development has become a key concern. The analyst firm International Business Strategies (IBS) has estimated total system-on-chip (SoC) development costs at $93 million at 32 nm and $142 million at 22nm. In both cases, the software portion of these costs is higher than the hardware portion.

It now appears that developing nations will lead the global economic recovery and thus provide a strong market for semiconductor companies. According to an October 2009 forecast from the International Monetary Fund, 2010 GDP growth is expected to be only 1.3 percent for the United States, 1.7 percent for Japan, and 0.03 percent for the European Union. However, GDP growth is forecast at 9 percent for China and in India it is projected to grow at 6.4 percent. In 2008, the Indian semiconductor market was forecast by the India Semiconductor Association-Frost & Sullivan report to grow from $6.72 billion in 2009 to $7.59 billion in 2010, and to grow at a compound annual growth rate (CAGR) of 6.4 times the global CAGR through 2010.

A different IC market
Semiconductor companies are working hard to scale existing businesses, to complement existing product lines, to focus on strategic areas, and to save costs. In the fall of 2009, for instance, Virage Logic purchased NXP's CMOS IP portfolio, as NXP decided to focus on high-performance mixed-signal ICs. NXP had previously formed a joint venture with STMicroelectronics to sell wireless products, which in turn bought NXP's wireless technology and formed a joint venture with Ericsson.

The trend towards "fab lite" semiconductor companies continued in 2009 when AMD spun off GlobalFoundries, its Dresden, Germany fabrication facility. Later in 2009, the parent company of GlobalFoundries, based in Abu Dhabi, announced its intention to acquire Chartered Semiconductor.

Significantly, the ventures cited above cross international boundaries, and are part of the ongoing trend towards globalization. IC design, manufacturing, test, packaging, and product assembly are increasingly taking place in many different parts of the world, with multiple companies and geographically dispersed teams. Success at globalization requires companies to think "locally" in places they operate, taking advantage of local supply chains, markets, partners, and engineering talent.

Collaboration will continue to accelerate on a global basis. The Common Platform, which brought together competitors including IBM, Chartered, and Samsung to share the costs of next-generation process technology, is one example. Deep, pro-active collaborations between EDA vendors and semiconductor providers have become crucial. Cadence in 2009 announced collaborations on advanced process node design with ARM, TSMC, SMIC, GlobalFoundries, UMC, IBM, Common Platform, and other partners.

EDA providers can help enable a recovery in the semiconductor business by lowering the costs of design and verification. One way to lower SoC development costs is to engage in massive reuse of silicon IP. To help, the EDA industry needs to focus not only on "design" but on IP integration. Another way to lower costs is to move up in abstraction. Electronic system level design and verification flows based on SystemC transaction-level modeling are now providing significant advantages for customers.

In 2010, EDA providers must not only solve technology problems, but must also help customers reduce design and verification costs, differentiate themselves from competitors, and collaborate with partners on a worldwide basis. To do this, the EDA industry must focus on integrated solutions and close partnerships rather than simply selling point tools.

As we look ahead to 2010 and beyond, the challenges are great for the semiconductor and EDA industries but so are the opportunities. We must learn to thrive in an increasingly globalized world and in a collaborative yet competitive ecosystem. We must change the way we think about "tools" and focus instead on "solutions." And we must work together to reduce the escalating cost of high-quality design, remove productivity bottlenecks, and build a bright new future for the electronics industry.

- Lip-Bu Tan
??President and CEO
??Cadence Design Systems Inc.

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