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DSPs integrate improved accelerators, interconnects

Posted: 19 Feb 2010 ?? ?Print Version ?Bookmark and Share

Keywords:DSP? wireless base station? WiMAX? accelerator? interconnect?

The MSC8155 DSP is code- and pin-compatible with the MSC8156, thereby easing migration and allowing for deployment of both parts in a single wireless base station design. The versatility of the new DSP enables multi-standard software definable radio for common base station platforms and helps OEMs save operating expenses by taking advantage of core programmability and the multi-standard baseband accelerator.

Enhanced acceleration
The enhanced MAPLE-B2L baseband accelerator embedded in the MSC8155 DSP gives OEMs more headroom to easily add differentiating features. MAPLE-B2L delivers exceptional overall performance to meet extremely high data rates and very low latencies required by next-generation broadband wireless base stations. The accelerator features a new and extremely high performance Turbo encoder, a higher throughput Turbo decoder and Fourier transforms acceleration engines.

The MAPLE-B2L offers turbo decoding with rate de-matching and HARQ-combining capacity of up to 330 Mbps at eight iterations, Viterbi decoding of up to 200Mbit/s and turbo encoding with rate matching capabilities up to 900Mbit/s. The embedded FFT engines support up to 900MSps of FFT/iFFT or 630MSps of DFT/iDFT throughputs. And it also provides CRC check or insertion with up to 10Gbit/s throughput.

High-throughput interconnect
To support the high throughput generated by the six high-performance cores and MAPLE-B2L, the MSC8155 is equipped with the latest Serial RapidIO Gen2 standard serial interface supporting up to 5Gbaud per lane and featuring enhanced messaging unit support for Type 9 streaming that enables the combination of multiple and different types of data streams over the same interconnect. It delivers up to 16Gbit/s bandwidth for each direction to enable high throughput interconnect between multiple devices on multi-DSP multi-sector base station channel cards. Other high bandwidth peripherals include Dual Gigabit Ethernet SGMII/RGMII and 64bit DDR2/3 memory interface at 800MHz.

Freescale offers a full set of development tools and enablement software for the MSC8155 device. The CodeWarrior Integrated Development Environment leverages Eclipse technology to provide a comprehensive multicore development environment. It includes C and C++ optimizing compilers, a source level debugger, core and device simulators, software analysis plug-ins for profiling and program/data trace, and the royalty-free SmartDSP OS delivered with optimized device drivers. Development boards are available to enable software development along with a set of reference software components for key 3G-LTE algorithms.

The MSC8156 DSP has been qualified on advanced 45nm process technology and is now ramping into production. Freescale plans to sample the new MSC8155 device to select customers in Q3 10. The MSC8155 is housed in a 783-pin FC-PBGA package.


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