Startup breaks out with 3D PLDs

Teig: I asked myself what if there was a new class of programmable device beyond FPGA.

Tabula has raised about $106 million in venture capital and has 100 employees. Its staff includes veterans in the electronics industry such as Dennis Segers, CEO, who spent more than 10 years at Xilinx where he spearheaded the development and market entry of Virtex; Steve Teig, founder, president and chief technology officer, who comes from Cadence and is considered the inventor of modern place-and-route technology; and Daniel Gitlin, VP, manufacturing technology, who spent about 18 years at Xilinx and is responsible for Tabula gaining access to TSMC's 40nm technology in September 2007 during the early days of that node.

When at Cadence, Teig realized his customers were grappling with the expense of programmable devices or the expense and effort that goes into developing ASICs. It was here that he incubated the idea of Spacetime.

"As CTO of Cadence, I frequently observed just how expensive, time-consuming, and risky ASIC and ASSP tape-outs were becoming," said Teig. "I asked myself what if there was a new class of programmable device beyond FPGA: one with unprecedented capacity, memory, throughput, and performance at a price suitable for volume production. Such a device could displace not only FPGAs but also the vast majority of ASICs and ASSPs, finally delivering on the promise of programmable devices to change the whole digital logic landscape and not just a corner of it. After much effort, I realized that I could see how to build such a device, one that could help not only large companies but also two guys in a garage to design hardware quickly and inexpensively, getting into volume production without having to abandon programmability. I had to start a company."

Spacetime concept
The Spacetime technology uses time as a third dimension in programmable logic while maintaining a familiar design flow. Tabula calls the result a new class of programmable devices called 3PLDs (from 3D programmable logic devices), which they claim will deliver higher performance than traditional 40nm FPGAs.

Figure 1: Tabula claims its architecture delivers significant performance and logic density advantages over traditional FPGAs.

"We are doing nothing exotic with the process," explained Alain Bismuth, VP, marketing. "We are using TSMC's standard 40nm process in a standard high-performance package—there is nothing like chip stacking or 3D silicon." Spacetime devices instead reconfigure on the fly at multi-gigahertz rates, executing each portion of a design in an automatically defined sequence of steps. Spacetime uses this ultra-rapid reconfiguration to make time a third dimension (Figure 1), resulting in a 3D device with multiple folds in which computation and signal transmission can occur. Each fold performs a portion of the desired function and stores the result in place.

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