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Achieving timing closure in basic (PMA direct) functional mode

Posted: 11 Mar 2010 ?? ?Print Version ?Bookmark and Share

Keywords:achieve timing closure? functional mode? transceiver design?

Transceiver channels configured in Basic (PMA Direct) functional mode only use the physical medium attachment (PMA) blocks of the transceiver channels. The physical coding sub-layer (PCS) blocks of all channels are bypassed.

The interface between the transceivers and the FPGA core introduces significant delay on the clocks that are forwarded from the transceivers to the user logic in the FPGA core. A phase-compensation FIFO buffer in the transceiver PCS block compensates for the phase difference (due to delays) between the transceiver clocks used internally and the ones routed to and from the FPGA core. When transceivers are used in Basic (PMA Direct) functional mode, the phase-compensation FIFO buffer is bypassed because the entire PCS block is bypassed. The result is that the timing requirement is not easily met for the transmit side of the transceiver beyond certain interface frequencies.

This application note describes two methods to achieve timing closure for designs that use transceivers in Basic (PMA Direct) mode at higher data rates for Altera's Stratix IV GX or Stratix IV GT FPGAs.

View the PDF document for more information.

Click here to view related datasheets.

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