Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Manufacturing/Packaging

TSMC skips 22nm, leaps to 20nm half-node

Posted: 15 Apr 2010 ?? ?Print Version ?Bookmark and Share

Keywords:TSMC 20nm process? lithography? high-k/metal gate? EUV?

Taiwan Semiconductor Manufacturing Co. Ltd announced plans to skip the 22nm "full node" after the 28nm node and move directly to the 20nm "half node."

At its technology conference, the foundry giant also provided details about its 20nm CMOS process, which will be the company's main technology platform after the 28nm node. TSMC will also not offer an 18nm process.

TSMC's 20nm process is a 10-level metal technology based on a planar technology. It will feature a high-k/metal gate scheme, strained silicon and newfangled "low-resistance" copper ultra-low-k interconnects!or what it calls "low-r." For the 20nm node, it will only offer a high-k/metal-gate scheme for the gate stack!and not a silicon dioxide option.

The foundry giant will continue to use 193nm immersion lithography at 20nm, but it will also deploy a double-patterning and source-mask optimization schemes. Unlike its previous processes in recent times!which focused on low power first!TSMC's initial 20nm process will be a high-performance technology. Following that process, it will roll out a low-power technology.

With the announcement, TSMC is seeking to gain an edge over its leading-edge rivals, such a GlobalFoundries, Samsung and United Microelectronics Corp. Both Samsung and UMC have said little or nothing about their respective 2xnm nodes.

By going to 20nm, TSMC is leapfrogging one rival!at least on paper. Recently, GlobalFoundries Inc. said it is starting work on its 22nm CMOS process, which is due out in 2H 12. TSMC is also looking at the second half of 2012.

In comparison, Intel Corp. is expected to be at the 22nm node by the fourth quarter of 2011. As for which vendor is leading in the foundry race at 2xnm, it's unclear until a company "beats the drum and announces they are in production," said Dean Freeman, an analyst with Gartner Inc.

Meanwhile, TSMC is taking a different approach with its process nodes. In the past, TSMC marched down a predictable process path, as defined basically by the ITRS roadmap. Then, it would generally offer a "half-node" process as a means to migrate customers to the next node.

As of late, TSMC generally pushed its customers to the half-node process, possibly as a means to differentiate itself. For example, TSMC rolled out a 32nm process, but it will move customers over to the 28nm technology.

At one time, it was widely believed that TSMC would offer a 22nm node. "22nm was an option for customers, but we decided to skip it," said Shang-yi Chiang, TSMC's senior VP of research and development. In an interview, Chiang said that the move to 20nm creates a better gate density and chip performance to cost ratio than a 22nm process technology.

At the 2xnm foundry node, cost and complexity will continue to escalate for customers. In recent times, TSMC has provided process flows, design kits and intellectual property (IP) to help reduce foundry costs. "Customers must engage with us at a much earlier stage" at 20nm to reduce costs and complexity, Chiang told EE Times.

1???2???3?Next Page?Last Page

Article Comments - TSMC skips 22nm, leaps to 20nm half-...
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top