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800MSps DAC halves data input pins in wireless apps

Posted: 23 Apr 2010 ?? ?Print Version ?Bookmark and Share

Keywords:DAC? amplifier? interface? FPGA?


Texas Instruments Inc. has released a 16bit, 800MSps interpolating DAC, which provides 75dBc third-order intermodulation distortion (IMD3) at 200MHz. Offered in a 7mm x 7mm QFN package, the DAC3283 is also touted as the smallest DAC in its class, saving valuable board space in wireless communications, SDR, test and measurement, and power amplifier linearization applications.

Incorporating a single byte wide differential interface, the DAC3283 reduces data input pins by 50 percent, allowing designers to choose a lower-cost FPGA or ASIC to precede the DAC.

The converter also features single-carrier W-CDMA adjacent channel leakage ratio of 81dBc for 153MHz IF that offers improved spectral performance while simplifying system design. Selectable 2x/4x interpolator filters allow for lower reduced data input rates, while taking advantage of up to 800MSps DAC rates.

In addition, I/Q phase and offset correction provides better performance when driving quadrature modulators (TRF370417) in demanding 3G, 4G and multicarrier systems with transmit frequencies from 50MHz to 6GHz. Multi-DAC synchronization support reduces design complexity for diversity and smart antenna radios.

The DAC3283 is available now in a 48-pin, 7mm x 7mm QFN package. Pricing is $26.95 in 1,000-unit quantities. The footprint-compatible DAC3282, a 625MSps DAC optimized for baseband and low-IF transmitters with 2x interpolation and sinc-correction filter, is available and priced at $24.95. TI also offers the DAC3282 and DAC3283 evaluation modules (EVMs), complete with a transceiver chain that includes a high-performance clock generator (CDCE62005) and the TRF370417 quadrature modulator. The DAC EVMs are fully compatible with TI's TSW3100 pattern generator module to provide rapid evaluation.

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