Rapid prototyping systems achieve up to 200MHz

Synopsys is offering the HAPS-60 series of rapid prototyping systems, a part of the company's ConfirmaRapid Prototyping Platform, designed to enable early hardware/software co-verification and system-level integration at near-real-time run-rates, using at-speed, real-world interfaces.

Based on the Xilinx Virtex-6 FPGAs the system can be used with pre-tested DesignWare IP and advanced verification modes with the proven Confirma software suite.

Achieving clock frequencies of up to 200MHz, the HAPS-60 series supports applications requiring real-time interfaces such as video, cellular data or live network traffic. The boards run up to 30 percent faster than previous generations of HAPS products.

Software developers benefit by being able to write, execute and debug code in a near real-time system-level environment, enabling the early identification and elimination of hardware and software bugs months ahead of silicon availability.

The flexible architecture of HAPS systems, combined with advanced high-capacity partitioning software and automated high-speed time division multiplexing provides capacity to build prototypes of very large SoCs.

A single HAPS board can support designs up to 18M ASIC gates (more than double the capacity of the previous generation), and multiple boards can be connected together for higher capacity.

Many of the DesignWare IP cores such as SuperSpeed USB 3.0, PCIe and HDMI are pre-tested on HAPS systems enabling designers to use the same SoC production RTL. Using the same RTL from prototype to production reduces project schedule and risk.

Built on Synopsys' Universal Multi-Resource Bus technology, new modes of verification for use with HAPS include co-simulation through standard PLI and SCE-MI 2.0 transaction interfaces with Synopsys VCS and Innovator products, C/C++ programs, and other event driven simulators.

- Colin Holland
Embedded.com