Why electronics industry needs 3D shift
Keywords:3D? 3D TV? IC design? EDA?
Why 3D extraction? It all comes down to the need to create, from the layout view, a more precise electrical circuit model, which when simulated gives the designer performance characteristics such as timing, power and noise, as well as other important parameters like gain, bandwidth and reliability.
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MOMCAP structure |
2.5D extraction issues
Traditional tools, available from the large EDA providers, are polarized. On one hand, 2.5D extractors scan through the layout geometries, devices and interconnect, looking for matches with pre-characterized patterns. When they find a match, they check sizes, run some calculations, and produce R and C values for back-annotation into the netlist. Capacity is rarely a problem for these products, and performance has been mostly acceptable (though the run time is lengthening, due to a greater number of more complex patterns for which to check); what has become increasingly an issue is precision. The figure on the right shows a typical MOMCAP structure, which due to the 3D topology requires 3D extraction to ensure accuracy, 2D or 2.5D extractors simply don't handle this topology correctly.
At the more advanced process nodes, designers need to extract distributed RC models that incorporate crosstalk, fringing and shielding capacitance¡ªand more¡ªbetween interconnect segments in an increasingly complex metal stack, as well as between devices and interconnect. And don't forget the substrate. Since 2.5D extraction lacks the necessary precision for nm designs, designers are forced to follow conservative or pessimistic design practices, giving sub-optimal designs. The alternative is design failure.
3D extraction setbacks
On the other hand, existing 3D extraction technologies from the same large EDA companies (field solvers that use finite element, finite difference, boundary element or similar methods to provide an accurate solution of the governing Maxwell's equations) are computationally inefficient when facing today's large and complex designs, with run-times impractical for anything other than finely-focused usage. Proponents of these tools often explain that by increasing the coarseness of the mesh, run-time can be improved, and indeed it can. At a considerable expense to precision. To achieve the accuracy needed for today's designs, a fine-grained, or dense, mesh is needed, increasing the run-time and memory footprint exponentially. In addition, with a dense mesh, boundary conditions have to be traded off against memory footprint¡ªto control memory usage, these field solvers reduce the "interaction region" around the extracted element, ignoring or inaccurately representing some nearby geometries, and further impacting accuracy.
Need for improved accuracy
What is needed is an innovation in 3D extraction technology, to move us past the limitations of existing solutions. This solution should provide a consistent and accurate netlist without complex set-up, and achieve run-times that enable broad, scalable deployment on critical nets and regions on complex chips. At Silicon Frontline, we're delivering 3D field solver products with new technology that allow designers access to the full capabilities of advanced process nodes, including new device types and DFM constructs, while reducing the number of verification iterations.
At the end of the day, the electronics industry needs an accurate 3D electrical circuit model that supports the goal of achieving a quality design. Adopting the latest 3D EDA technology is one way to achieve this goal.
- Dermott Lynch
Vice President, Sales and Marketing
Silicon Frontline Inc.
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