Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > EDA/IP

PCB layout guidelines for SPEAr3xx

Posted: 24 May 2010 ?? ?Print Version ?Bookmark and Share

Keywords:PCB layout? SPEAr3xx layout guideline? SPEAr3xx applications?

SPEAr3xx is a 15 x15 mm LFBGA289 device family with 0.8mm ball pitch. The SPEAr3xx family includes SPEAr300, SPEAr310 and SPEAr320.

SPEAr3xx devices all feature the ARM926 core running at up to 333MHz, an external DDR2 memory interface and a configurable set of powerful on-chip peripherals.

This application note provides guidelines for successfully designing the PCB layout for SPEAr3xx applications. It covers the following main topics:

? Power integrity;
? DDR memory interface;
? USB signals;
? GPIO/CLD signals;
? External clock.

View the PDF document for more information.

Click here to view related datasheets.

Article Comments - PCB layout guidelines for SPEAr3xx
*? You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top